Lines Matching defs:mpc8xxx_gc
65 struct mpc8xxx_gpio_chip *mpc8xxx_gc = gpiochip_get_data(gc);
68 out_mask = gc->read_reg(mpc8xxx_gc->regs + GPIO_DIR);
69 val = gc->read_reg(mpc8xxx_gc->regs + GPIO_DAT) & ~out_mask;
78 struct mpc8xxx_gpio_chip *mpc8xxx_gc = gpiochip_get_data(gc);
83 return mpc8xxx_gc->direction_output(gc, gpio, val);
89 struct mpc8xxx_gpio_chip *mpc8xxx_gc = gpiochip_get_data(gc);
94 return mpc8xxx_gc->direction_output(gc, gpio, val);
99 struct mpc8xxx_gpio_chip *mpc8xxx_gc = gpiochip_get_data(gc);
101 if (mpc8xxx_gc->irq && offset < MPC8XXX_GPIO_PINS)
102 return irq_create_mapping(mpc8xxx_gc->irq, offset);
109 struct mpc8xxx_gpio_chip *mpc8xxx_gc = data;
110 struct gpio_chip *gc = &mpc8xxx_gc->gc;
114 mask = gc->read_reg(mpc8xxx_gc->regs + GPIO_IER)
115 & gc->read_reg(mpc8xxx_gc->regs + GPIO_IMR);
117 generic_handle_domain_irq(mpc8xxx_gc->irq, 31 - i);
124 struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d);
125 struct gpio_chip *gc = &mpc8xxx_gc->gc;
128 raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
130 gc->write_reg(mpc8xxx_gc->regs + GPIO_IMR,
131 gc->read_reg(mpc8xxx_gc->regs + GPIO_IMR)
134 raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);
139 struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d);
140 struct gpio_chip *gc = &mpc8xxx_gc->gc;
143 raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
145 gc->write_reg(mpc8xxx_gc->regs + GPIO_IMR,
146 gc->read_reg(mpc8xxx_gc->regs + GPIO_IMR)
149 raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);
154 struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d);
155 struct gpio_chip *gc = &mpc8xxx_gc->gc;
157 gc->write_reg(mpc8xxx_gc->regs + GPIO_IER,
163 struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d);
164 struct gpio_chip *gc = &mpc8xxx_gc->gc;
170 raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
171 gc->write_reg(mpc8xxx_gc->regs + GPIO_ICR,
172 gc->read_reg(mpc8xxx_gc->regs + GPIO_ICR)
174 raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);
178 raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
179 gc->write_reg(mpc8xxx_gc->regs + GPIO_ICR,
180 gc->read_reg(mpc8xxx_gc->regs + GPIO_ICR)
182 raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);
194 struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d);
195 struct gpio_chip *gc = &mpc8xxx_gc->gc;
202 reg = mpc8xxx_gc->regs + GPIO_ICR;
205 reg = mpc8xxx_gc->regs + GPIO_ICR2;
212 raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
215 raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);
220 raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
223 raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);
227 raw_spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
229 raw_spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);
302 struct mpc8xxx_gpio_chip *mpc8xxx_gc;
308 mpc8xxx_gc = devm_kzalloc(&pdev->dev, sizeof(*mpc8xxx_gc), GFP_KERNEL);
309 if (!mpc8xxx_gc)
312 platform_set_drvdata(pdev, mpc8xxx_gc);
314 raw_spin_lock_init(&mpc8xxx_gc->lock);
316 mpc8xxx_gc->regs = devm_platform_ioremap_resource(pdev, 0);
317 if (IS_ERR(mpc8xxx_gc->regs))
318 return PTR_ERR(mpc8xxx_gc->regs);
320 gc = &mpc8xxx_gc->gc;
325 mpc8xxx_gc->regs + GPIO_DAT,
327 mpc8xxx_gc->regs + GPIO_DIR, NULL,
334 mpc8xxx_gc->regs + GPIO_DAT,
336 mpc8xxx_gc->regs + GPIO_DIR, NULL,
344 mpc8xxx_gc->direction_output = gc->direction_output;
376 gc->write_reg(mpc8xxx_gc->regs + GPIO_IBE, 0xffffffff);
378 gc->bgpio_data = gc->read_reg(mpc8xxx_gc->regs + GPIO_DAT) &
379 gc->read_reg(mpc8xxx_gc->regs + GPIO_DIR);
382 ret = devm_gpiochip_add_data(&pdev->dev, gc, mpc8xxx_gc);
389 mpc8xxx_gc->irqn = platform_get_irq(pdev, 0);
390 if (mpc8xxx_gc->irqn < 0)
391 return mpc8xxx_gc->irqn;
393 mpc8xxx_gc->irq = irq_domain_create_linear(fwnode,
396 mpc8xxx_gc);
398 if (!mpc8xxx_gc->irq)
402 gc->write_reg(mpc8xxx_gc->regs + GPIO_IER, 0xffffffff);
403 gc->write_reg(mpc8xxx_gc->regs + GPIO_IMR, 0);
405 ret = devm_request_irq(&pdev->dev, mpc8xxx_gc->irqn,
408 mpc8xxx_gc);
412 mpc8xxx_gc->irqn, ret);
418 irq_domain_remove(mpc8xxx_gc->irq);
424 struct mpc8xxx_gpio_chip *mpc8xxx_gc = platform_get_drvdata(pdev);
426 if (mpc8xxx_gc->irq) {
427 irq_set_chained_handler_and_data(mpc8xxx_gc->irqn, NULL, NULL);
428 irq_domain_remove(mpc8xxx_gc->irq);