Lines Matching refs:gc
127 static unsigned long bgpio_line2mask(struct gpio_chip *gc, unsigned int line)
129 if (gc->be_bits)
130 return BIT(gc->bgpio_bits - 1 - line);
134 static int bgpio_get_set(struct gpio_chip *gc, unsigned int gpio)
136 unsigned long pinmask = bgpio_line2mask(gc, gpio);
137 bool dir = !!(gc->bgpio_dir & pinmask);
140 return !!(gc->read_reg(gc->reg_set) & pinmask);
142 return !!(gc->read_reg(gc->reg_dat) & pinmask);
149 static int bgpio_get_set_multiple(struct gpio_chip *gc, unsigned long *mask,
158 set_mask = *mask & gc->bgpio_dir;
159 get_mask = *mask & ~gc->bgpio_dir;
162 *bits |= gc->read_reg(gc->reg_set) & set_mask;
164 *bits |= gc->read_reg(gc->reg_dat) & get_mask;
169 static int bgpio_get(struct gpio_chip *gc, unsigned int gpio)
171 return !!(gc->read_reg(gc->reg_dat) & bgpio_line2mask(gc, gpio));
177 static int bgpio_get_multiple(struct gpio_chip *gc, unsigned long *mask,
182 *bits |= gc->read_reg(gc->reg_dat) & *mask;
189 static int bgpio_get_multiple_be(struct gpio_chip *gc, unsigned long *mask,
200 for_each_set_bit(bit, mask, gc->ngpio)
201 readmask |= bgpio_line2mask(gc, bit);
204 val = gc->read_reg(gc->reg_dat) & readmask;
210 for_each_set_bit(bit, &val, gc->ngpio)
211 *bits |= bgpio_line2mask(gc, bit);
216 static void bgpio_set_none(struct gpio_chip *gc, unsigned int gpio, int val)
220 static void bgpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
222 unsigned long mask = bgpio_line2mask(gc, gpio);
225 raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
228 gc->bgpio_data |= mask;
230 gc->bgpio_data &= ~mask;
232 gc->write_reg(gc->reg_dat, gc->bgpio_data);
234 raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
237 static void bgpio_set_with_clear(struct gpio_chip *gc, unsigned int gpio,
240 unsigned long mask = bgpio_line2mask(gc, gpio);
243 gc->write_reg(gc->reg_set, mask);
245 gc->write_reg(gc->reg_clr, mask);
248 static void bgpio_set_set(struct gpio_chip *gc, unsigned int gpio, int val)
250 unsigned long mask = bgpio_line2mask(gc, gpio);
253 raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
256 gc->bgpio_data |= mask;
258 gc->bgpio_data &= ~mask;
260 gc->write_reg(gc->reg_set, gc->bgpio_data);
262 raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
265 static void bgpio_multiple_get_masks(struct gpio_chip *gc,
275 for_each_set_bit(i, mask, gc->bgpio_bits) {
277 *set_mask |= bgpio_line2mask(gc, i);
279 *clear_mask |= bgpio_line2mask(gc, i);
283 static void bgpio_set_multiple_single_reg(struct gpio_chip *gc,
291 raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
293 bgpio_multiple_get_masks(gc, mask, bits, &set_mask, &clear_mask);
295 gc->bgpio_data |= set_mask;
296 gc->bgpio_data &= ~clear_mask;
298 gc->write_reg(reg, gc->bgpio_data);
300 raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
303 static void bgpio_set_multiple(struct gpio_chip *gc, unsigned long *mask,
306 bgpio_set_multiple_single_reg(gc, mask, bits, gc->reg_dat);
309 static void bgpio_set_multiple_set(struct gpio_chip *gc, unsigned long *mask,
312 bgpio_set_multiple_single_reg(gc, mask, bits, gc->reg_set);
315 static void bgpio_set_multiple_with_clear(struct gpio_chip *gc,
321 bgpio_multiple_get_masks(gc, mask, bits, &set_mask, &clear_mask);
324 gc->write_reg(gc->reg_set, set_mask);
326 gc->write_reg(gc->reg_clr, clear_mask);
329 static int bgpio_simple_dir_in(struct gpio_chip *gc, unsigned int gpio)
334 static int bgpio_dir_out_err(struct gpio_chip *gc, unsigned int gpio,
340 static int bgpio_simple_dir_out(struct gpio_chip *gc, unsigned int gpio,
343 gc->set(gc, gpio, val);
348 static int bgpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
352 raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
354 gc->bgpio_dir &= ~bgpio_line2mask(gc, gpio);
356 if (gc->reg_dir_in)
357 gc->write_reg(gc->reg_dir_in, ~gc->bgpio_dir);
358 if (gc->reg_dir_out)
359 gc->write_reg(gc->reg_dir_out, gc->bgpio_dir);
361 raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
366 static int bgpio_get_dir(struct gpio_chip *gc, unsigned int gpio)
369 if (gc->bgpio_dir_unreadable) {
370 if (gc->bgpio_dir & bgpio_line2mask(gc, gpio))
375 if (gc->reg_dir_out) {
376 if (gc->read_reg(gc->reg_dir_out) & bgpio_line2mask(gc, gpio))
381 if (gc->reg_dir_in)
382 if (!(gc->read_reg(gc->reg_dir_in) & bgpio_line2mask(gc, gpio)))
388 static void bgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
392 raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
394 gc->bgpio_dir |= bgpio_line2mask(gc, gpio);
396 if (gc->reg_dir_in)
397 gc->write_reg(gc->reg_dir_in, ~gc->bgpio_dir);
398 if (gc->reg_dir_out)
399 gc->write_reg(gc->reg_dir_out, gc->bgpio_dir);
401 raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
404 static int bgpio_dir_out_dir_first(struct gpio_chip *gc, unsigned int gpio,
407 bgpio_dir_out(gc, gpio, val);
408 gc->set(gc, gpio, val);
412 static int bgpio_dir_out_val_first(struct gpio_chip *gc, unsigned int gpio,
415 gc->set(gc, gpio, val);
416 bgpio_dir_out(gc, gpio, val);
421 struct gpio_chip *gc,
425 switch (gc->bgpio_bits) {
427 gc->read_reg = bgpio_read8;
428 gc->write_reg = bgpio_write8;
432 gc->read_reg = bgpio_read16be;
433 gc->write_reg = bgpio_write16be;
435 gc->read_reg = bgpio_read16;
436 gc->write_reg = bgpio_write16;
441 gc->read_reg = bgpio_read32be;
442 gc->write_reg = bgpio_write32be;
444 gc->read_reg = bgpio_read32;
445 gc->write_reg = bgpio_write32;
455 gc->read_reg = bgpio_read64;
456 gc->write_reg = bgpio_write64;
461 dev_err(dev, "unsupported data width %u bits\n", gc->bgpio_bits);
490 static int bgpio_setup_io(struct gpio_chip *gc,
497 gc->reg_dat = dat;
498 if (!gc->reg_dat)
502 gc->reg_set = set;
503 gc->reg_clr = clr;
504 gc->set = bgpio_set_with_clear;
505 gc->set_multiple = bgpio_set_multiple_with_clear;
507 gc->reg_set = set;
508 gc->set = bgpio_set_set;
509 gc->set_multiple = bgpio_set_multiple_set;
511 gc->set = bgpio_set_none;
512 gc->set_multiple = NULL;
514 gc->set = bgpio_set;
515 gc->set_multiple = bgpio_set_multiple;
520 gc->get = bgpio_get_set;
521 if (!gc->be_bits)
522 gc->get_multiple = bgpio_get_set_multiple;
531 gc->get = bgpio_get;
532 if (gc->be_bits)
533 gc->get_multiple = bgpio_get_multiple_be;
535 gc->get_multiple = bgpio_get_multiple;
541 static int bgpio_setup_direction(struct gpio_chip *gc,
547 gc->reg_dir_out = dirout;
548 gc->reg_dir_in = dirin;
550 gc->direction_output = bgpio_dir_out_dir_first;
552 gc->direction_output = bgpio_dir_out_val_first;
553 gc->direction_input = bgpio_dir_in;
554 gc->get_direction = bgpio_get_dir;
557 gc->direction_output = bgpio_dir_out_err;
559 gc->direction_output = bgpio_simple_dir_out;
560 gc->direction_input = bgpio_simple_dir_in;
576 * @gc: the GPIO chip to set up
601 int bgpio_init(struct gpio_chip *gc, struct device *dev,
611 gc->bgpio_bits = sz * 8;
612 if (gc->bgpio_bits > BITS_PER_LONG)
615 raw_spin_lock_init(&gc->bgpio_lock);
616 gc->parent = dev;
617 gc->label = dev_name(dev);
618 gc->base = -1;
619 gc->request = bgpio_request;
620 gc->be_bits = !!(flags & BGPIOF_BIG_ENDIAN);
622 ret = gpiochip_get_ngpios(gc, dev);
624 gc->ngpio = gc->bgpio_bits;
626 gc->bgpio_bits = roundup_pow_of_two(round_up(gc->ngpio, 8));
628 ret = bgpio_setup_io(gc, dat, set, clr, flags);
632 ret = bgpio_setup_accessors(dev, gc, flags & BGPIOF_BIG_ENDIAN_BYTE_ORDER);
636 ret = bgpio_setup_direction(gc, dirout, dirin, flags);
640 gc->bgpio_data = gc->read_reg(gc->reg_dat);
641 if (gc->set == bgpio_set_set &&
643 gc->bgpio_data = gc->read_reg(gc->reg_set);
646 gc->bgpio_dir_unreadable = true;
651 if ((gc->reg_dir_out || gc->reg_dir_in) &&
653 if (gc->reg_dir_out)
654 gc->bgpio_dir = gc->read_reg(gc->reg_dir_out);
655 else if (gc->reg_dir_in)
656 gc->bgpio_dir = ~gc->read_reg(gc->reg_dir_in);
663 if (gc->reg_dir_out && gc->reg_dir_in)
664 gc->write_reg(gc->reg_dir_in, ~gc->bgpio_dir);
743 struct gpio_chip *gc;
781 gc = devm_kzalloc(&pdev->dev, sizeof(*gc), GFP_KERNEL);
782 if (!gc)
785 err = bgpio_init(gc, dev, sz, dat, set, clr, dirout, dirin, flags);
791 gc->label = pdata->label;
792 gc->base = pdata->base;
794 gc->ngpio = pdata->ngpio;
797 platform_set_drvdata(pdev, gc);
799 return devm_gpiochip_add_data(&pdev->dev, gc, NULL);