Lines Matching defs:bits
37 * ` 8, 16, 32 and 64 bits registers are supported, and``.
146 * This assumes that the bits in the GPIO register are in native endianness.
150 unsigned long *bits)
155 /* Make sure we first clear any bits that are zero when we read the register */
156 *bits &= ~*mask;
162 *bits |= gc->read_reg(gc->reg_set) & set_mask;
164 *bits |= gc->read_reg(gc->reg_dat) & get_mask;
175 * This only works if the bits in the GPIO register are in native endianness.
178 unsigned long *bits)
180 /* Make sure we first clear any bits that are zero when we read the register */
181 *bits &= ~*mask;
182 *bits |= gc->read_reg(gc->reg_dat) & *mask;
190 unsigned long *bits)
196 /* Make sure we first clear any bits that are zero when we read the register */
197 *bits &= ~*mask;
207 * Mirror the result into the "bits" result, this will give line 0
211 *bits |= bgpio_line2mask(gc, bit);
266 unsigned long *mask, unsigned long *bits,
276 if (test_bit(i, bits))
285 unsigned long *bits,
293 bgpio_multiple_get_masks(gc, mask, bits, &set_mask, &clear_mask);
304 unsigned long *bits)
306 bgpio_set_multiple_single_reg(gc, mask, bits, gc->reg_dat);
310 unsigned long *bits)
312 bgpio_set_multiple_single_reg(gc, mask, bits, gc->reg_set);
317 unsigned long *bits)
321 bgpio_multiple_get_masks(gc, mask, bits, &set_mask, &clear_mask);
461 dev_err(dev, "unsupported data width %u bits\n", gc->bgpio_bits);