Lines Matching refs:chip
53 * The digital-chip EIC controller can support maximum 3 banks, and each bank
66 * The Spreadtrum digital-chip EIC controller contains 4 sub-modules:
93 struct gpio_chip chip;
139 static void sprd_eic_update(struct gpio_chip *chip, unsigned int offset,
142 struct sprd_eic *sprd_eic = gpiochip_get_data(chip);
160 static int sprd_eic_read(struct gpio_chip *chip, unsigned int offset, u16 reg)
162 struct sprd_eic *sprd_eic = gpiochip_get_data(chip);
169 static int sprd_eic_request(struct gpio_chip *chip, unsigned int offset)
171 sprd_eic_update(chip, offset, SPRD_EIC_DBNC_DMSK, 1);
175 static void sprd_eic_free(struct gpio_chip *chip, unsigned int offset)
177 sprd_eic_update(chip, offset, SPRD_EIC_DBNC_DMSK, 0);
180 static int sprd_eic_get(struct gpio_chip *chip, unsigned int offset)
182 struct sprd_eic *sprd_eic = gpiochip_get_data(chip);
186 return sprd_eic_read(chip, offset, SPRD_EIC_DBNC_DATA);
188 return sprd_eic_read(chip, offset, SPRD_EIC_ASYNC_DATA);
190 return sprd_eic_read(chip, offset, SPRD_EIC_SYNC_DATA);
196 static int sprd_eic_direction_input(struct gpio_chip *chip, unsigned int offset)
202 static void sprd_eic_set(struct gpio_chip *chip, unsigned int offset, int value)
207 static int sprd_eic_set_debounce(struct gpio_chip *chip, unsigned int offset,
210 struct sprd_eic *sprd_eic = gpiochip_get_data(chip);
222 static int sprd_eic_set_config(struct gpio_chip *chip, unsigned int offset,
229 return sprd_eic_set_debounce(chip, offset, arg);
236 struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
237 struct sprd_eic *sprd_eic = gpiochip_get_data(chip);
242 sprd_eic_update(chip, offset, SPRD_EIC_DBNC_IE, 0);
243 sprd_eic_update(chip, offset, SPRD_EIC_DBNC_TRIG, 0);
246 sprd_eic_update(chip, offset, SPRD_EIC_LATCH_INTEN, 0);
249 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTIE, 0);
252 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTIE, 0);
255 dev_err(chip->parent, "Unsupported EIC type.\n");
258 gpiochip_disable_irq(chip, offset);
263 struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
264 struct sprd_eic *sprd_eic = gpiochip_get_data(chip);
267 gpiochip_enable_irq(chip, offset);
271 sprd_eic_update(chip, offset, SPRD_EIC_DBNC_IE, 1);
272 sprd_eic_update(chip, offset, SPRD_EIC_DBNC_TRIG, 1);
275 sprd_eic_update(chip, offset, SPRD_EIC_LATCH_INTEN, 1);
278 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTIE, 1);
281 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTIE, 1);
284 dev_err(chip->parent, "Unsupported EIC type.\n");
290 struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
291 struct sprd_eic *sprd_eic = gpiochip_get_data(chip);
296 sprd_eic_update(chip, offset, SPRD_EIC_DBNC_IC, 1);
299 sprd_eic_update(chip, offset, SPRD_EIC_LATCH_INTCLR, 1);
302 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1);
305 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1);
308 dev_err(chip->parent, "Unsupported EIC type.\n");
314 struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
315 struct sprd_eic *sprd_eic = gpiochip_get_data(chip);
323 sprd_eic_update(chip, offset, SPRD_EIC_DBNC_IEV, 1);
324 sprd_eic_update(chip, offset, SPRD_EIC_DBNC_IC, 1);
327 sprd_eic_update(chip, offset, SPRD_EIC_DBNC_IEV, 0);
328 sprd_eic_update(chip, offset, SPRD_EIC_DBNC_IC, 1);
333 state = sprd_eic_get(chip, offset);
335 sprd_eic_update(chip, offset,
337 sprd_eic_update(chip, offset,
340 sprd_eic_update(chip, offset,
342 sprd_eic_update(chip, offset,
355 sprd_eic_update(chip, offset, SPRD_EIC_LATCH_INTPOL, 0);
356 sprd_eic_update(chip, offset, SPRD_EIC_LATCH_INTCLR, 1);
359 sprd_eic_update(chip, offset, SPRD_EIC_LATCH_INTPOL, 1);
360 sprd_eic_update(chip, offset, SPRD_EIC_LATCH_INTCLR, 1);
365 state = sprd_eic_get(chip, offset);
367 sprd_eic_update(chip, offset,
369 sprd_eic_update(chip, offset,
372 sprd_eic_update(chip, offset,
374 sprd_eic_update(chip, offset,
387 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 0);
388 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 0);
389 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTPOL, 1);
390 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1);
394 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 0);
395 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 0);
396 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTPOL, 0);
397 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1);
401 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 0);
402 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 1);
403 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1);
407 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 0);
408 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 1);
409 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTPOL, 1);
410 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1);
414 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 0);
415 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 1);
416 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTPOL, 0);
417 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1);
427 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 0);
428 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 0);
429 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTPOL, 1);
430 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1);
434 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 0);
435 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 0);
436 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTPOL, 0);
437 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1);
441 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 0);
442 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 1);
443 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1);
447 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 0);
448 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 1);
449 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTPOL, 1);
450 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1);
454 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 0);
455 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 1);
456 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTPOL, 0);
457 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1);
465 dev_err(chip->parent, "Unsupported EIC type.\n");
472 static void sprd_eic_toggle_trigger(struct gpio_chip *chip, unsigned int irq,
475 struct sprd_eic *sprd_eic = gpiochip_get_data(chip);
490 state = sprd_eic_get(chip, offset);
496 sprd_eic_update(chip, offset, SPRD_EIC_DBNC_IEV, 0);
498 sprd_eic_update(chip, offset, SPRD_EIC_DBNC_IEV, 1);
502 sprd_eic_update(chip, offset, SPRD_EIC_LATCH_INTPOL, 0);
504 sprd_eic_update(chip, offset, SPRD_EIC_LATCH_INTPOL, 1);
511 post_state = sprd_eic_get(chip, offset);
513 dev_warn(chip->parent, "EIC level was changed.\n");
521 static int sprd_eic_match_chip_by_type(struct gpio_chip *chip, void *data)
525 return !strcmp(chip->label, sprd_eic_label_name[type]);
528 static void sprd_eic_handle_one_type(struct gpio_chip *chip)
530 struct sprd_eic *sprd_eic = gpiochip_get_data(chip);
533 for (bank = 0; bank * SPRD_EIC_PER_BANK_NR < chip->ngpio; bank++) {
555 dev_err(chip->parent, "Unsupported EIC type.\n");
562 girq = irq_find_mapping(chip->irq.domain, offset);
565 sprd_eic_toggle_trigger(chip, girq, offset);
573 struct gpio_chip *chip;
579 * Since the digital-chip EIC 4 sub-modules (debounce, latch, async
584 chip = gpiochip_find(&type, sprd_eic_match_chip_by_type);
585 if (!chip)
588 sprd_eic_handle_one_type(chip);
644 sprd_eic->chip.label = sprd_eic_label_name[sprd_eic->type];
645 sprd_eic->chip.ngpio = pdata->num_eics;
646 sprd_eic->chip.base = -1;
647 sprd_eic->chip.parent = &pdev->dev;
648 sprd_eic->chip.direction_input = sprd_eic_direction_input;
651 sprd_eic->chip.request = sprd_eic_request;
652 sprd_eic->chip.free = sprd_eic_free;
653 sprd_eic->chip.set_config = sprd_eic_set_config;
654 sprd_eic->chip.set = sprd_eic_set;
658 sprd_eic->chip.get = sprd_eic_get;
665 irq = &sprd_eic->chip.irq;
674 ret = devm_gpiochip_add_data(&pdev->dev, &sprd_eic->chip, sprd_eic);