Lines Matching refs:offset
139 static void sprd_eic_update(struct gpio_chip *chip, unsigned int offset,
144 sprd_eic_offset_base(sprd_eic, offset / SPRD_EIC_PER_BANK_NR);
152 tmp |= BIT(SPRD_EIC_BIT(offset));
154 tmp &= ~BIT(SPRD_EIC_BIT(offset));
160 static int sprd_eic_read(struct gpio_chip *chip, unsigned int offset, u16 reg)
164 sprd_eic_offset_base(sprd_eic, offset / SPRD_EIC_PER_BANK_NR);
166 return !!(readl_relaxed(base + reg) & BIT(SPRD_EIC_BIT(offset)));
169 static int sprd_eic_request(struct gpio_chip *chip, unsigned int offset)
171 sprd_eic_update(chip, offset, SPRD_EIC_DBNC_DMSK, 1);
175 static void sprd_eic_free(struct gpio_chip *chip, unsigned int offset)
177 sprd_eic_update(chip, offset, SPRD_EIC_DBNC_DMSK, 0);
180 static int sprd_eic_get(struct gpio_chip *chip, unsigned int offset)
186 return sprd_eic_read(chip, offset, SPRD_EIC_DBNC_DATA);
188 return sprd_eic_read(chip, offset, SPRD_EIC_ASYNC_DATA);
190 return sprd_eic_read(chip, offset, SPRD_EIC_SYNC_DATA);
196 static int sprd_eic_direction_input(struct gpio_chip *chip, unsigned int offset)
202 static void sprd_eic_set(struct gpio_chip *chip, unsigned int offset, int value)
207 static int sprd_eic_set_debounce(struct gpio_chip *chip, unsigned int offset,
212 sprd_eic_offset_base(sprd_eic, offset / SPRD_EIC_PER_BANK_NR);
213 u32 reg = SPRD_EIC_DBNC_CTRL0 + SPRD_EIC_BIT(offset) * 0x4;
222 static int sprd_eic_set_config(struct gpio_chip *chip, unsigned int offset,
229 return sprd_eic_set_debounce(chip, offset, arg);
238 u32 offset = irqd_to_hwirq(data);
242 sprd_eic_update(chip, offset, SPRD_EIC_DBNC_IE, 0);
243 sprd_eic_update(chip, offset, SPRD_EIC_DBNC_TRIG, 0);
246 sprd_eic_update(chip, offset, SPRD_EIC_LATCH_INTEN, 0);
249 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTIE, 0);
252 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTIE, 0);
258 gpiochip_disable_irq(chip, offset);
265 u32 offset = irqd_to_hwirq(data);
267 gpiochip_enable_irq(chip, offset);
271 sprd_eic_update(chip, offset, SPRD_EIC_DBNC_IE, 1);
272 sprd_eic_update(chip, offset, SPRD_EIC_DBNC_TRIG, 1);
275 sprd_eic_update(chip, offset, SPRD_EIC_LATCH_INTEN, 1);
278 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTIE, 1);
281 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTIE, 1);
292 u32 offset = irqd_to_hwirq(data);
296 sprd_eic_update(chip, offset, SPRD_EIC_DBNC_IC, 1);
299 sprd_eic_update(chip, offset, SPRD_EIC_LATCH_INTCLR, 1);
302 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1);
305 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1);
316 u32 offset = irqd_to_hwirq(data);
323 sprd_eic_update(chip, offset, SPRD_EIC_DBNC_IEV, 1);
324 sprd_eic_update(chip, offset, SPRD_EIC_DBNC_IC, 1);
327 sprd_eic_update(chip, offset, SPRD_EIC_DBNC_IEV, 0);
328 sprd_eic_update(chip, offset, SPRD_EIC_DBNC_IC, 1);
333 state = sprd_eic_get(chip, offset);
335 sprd_eic_update(chip, offset,
337 sprd_eic_update(chip, offset,
340 sprd_eic_update(chip, offset,
342 sprd_eic_update(chip, offset,
355 sprd_eic_update(chip, offset, SPRD_EIC_LATCH_INTPOL, 0);
356 sprd_eic_update(chip, offset, SPRD_EIC_LATCH_INTCLR, 1);
359 sprd_eic_update(chip, offset, SPRD_EIC_LATCH_INTPOL, 1);
360 sprd_eic_update(chip, offset, SPRD_EIC_LATCH_INTCLR, 1);
365 state = sprd_eic_get(chip, offset);
367 sprd_eic_update(chip, offset,
369 sprd_eic_update(chip, offset,
372 sprd_eic_update(chip, offset,
374 sprd_eic_update(chip, offset,
387 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 0);
388 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 0);
389 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTPOL, 1);
390 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1);
394 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 0);
395 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 0);
396 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTPOL, 0);
397 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1);
401 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 0);
402 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 1);
403 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1);
407 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 0);
408 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 1);
409 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTPOL, 1);
410 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1);
414 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 0);
415 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 1);
416 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTPOL, 0);
417 sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1);
427 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 0);
428 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 0);
429 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTPOL, 1);
430 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1);
434 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 0);
435 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 0);
436 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTPOL, 0);
437 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1);
441 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 0);
442 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 1);
443 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1);
447 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 0);
448 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 1);
449 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTPOL, 1);
450 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1);
454 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 0);
455 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 1);
456 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTPOL, 0);
457 sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1);
473 unsigned int offset)
490 state = sprd_eic_get(chip, offset);
496 sprd_eic_update(chip, offset, SPRD_EIC_DBNC_IEV, 0);
498 sprd_eic_update(chip, offset, SPRD_EIC_DBNC_IEV, 1);
502 sprd_eic_update(chip, offset, SPRD_EIC_LATCH_INTPOL, 0);
504 sprd_eic_update(chip, offset, SPRD_EIC_LATCH_INTPOL, 1);
511 post_state = sprd_eic_get(chip, offset);
560 u32 offset = bank * SPRD_EIC_PER_BANK_NR + n;
562 girq = irq_find_mapping(chip->irq.domain, offset);
565 sprd_eic_toggle_trigger(chip, girq, offset);