Lines Matching defs:bank
30 /* The remaining registers are per GPIO bank */
31 #define GPIO_OUT_STATUS(bank) (0x00000000 + ((bank) << 2))
32 #define GPIO_IN_STATUS(bank) (0x00000020 + ((bank) << 2))
33 #define GPIO_OUT_SET(bank) (0x00000040 + ((bank) << 2))
34 #define GPIO_OUT_CLEAR(bank) (0x00000060 + ((bank) << 2))
35 #define GPIO_INT_STATUS(bank) (0x00000080 + ((bank) << 2))
36 #define GPIO_INT_MASK(bank) (0x000000a0 + ((bank) << 2))
37 #define GPIO_INT_MSKCLR(bank) (0x000000c0 + ((bank) << 2))
38 #define GPIO_PWD_STATUS(bank) (0x00000500 + ((bank) << 2))
170 /* read the GPIO bank status */
445 struct bcm_kona_gpio_bank *bank = irq_desc_get_handler_data(desc);
451 * For bank interrupts, we can't use chip_data to store the kona_gpio
453 * our pointer from the bank structure.
455 reg_base = bank->kona_gpio->reg_base;
456 bank_id = bank->id;
469 generic_handle_domain_irq(bank->kona_gpio->irq_domain,
548 /* Unlock the entire bank first */
552 /* Now re-lock the bank */
560 struct bcm_kona_gpio_bank *bank;
612 bank = &kona_gpio->banks[i];
613 bank->id = i;
614 bank->irq = platform_get_irq(pdev, i);
615 bank->kona_gpio = kona_gpio;
616 if (bank->irq < 0) {
617 dev_err(dev, "Couldn't get IRQ for bank %d", i);
633 bank = &kona_gpio->banks[i];
634 irq_set_chained_handler_and_data(bank->irq,
636 bank);