Lines Matching refs:reg
106 const enum aspeed_sgpio_reg reg)
108 switch (reg) {
174 enum aspeed_sgpio_reg reg;
179 reg = aspeed_sgpio_is_input(offset) ? reg_val : reg_rdata;
180 rc = !!(ioread32(bank_reg(gpio, bank, reg)) & GPIO_BIT(offset));
192 u32 reg = 0;
202 reg = ioread32(addr_r);
205 reg |= GPIO_BIT(offset);
207 reg &= ~GPIO_BIT(offset);
209 iowrite32(reg, addr_w);
293 u32 reg, bit;
306 reg = ioread32(addr);
308 reg |= bit;
310 reg &= ~bit;
312 iowrite32(reg, addr);
338 u32 bit, reg;
372 reg = ioread32(addr);
373 reg = (reg & ~bit) | type0;
374 iowrite32(reg, addr);
377 reg = ioread32(addr);
378 reg = (reg & ~bit) | type1;
379 iowrite32(reg, addr);
382 reg = ioread32(addr);
383 reg = (reg & ~bit) | type2;
384 iowrite32(reg, addr);
399 unsigned long reg;
406 reg = ioread32(bank_reg(data, bank, reg_irq_status));
408 for_each_set_bit(p, ®, 32)
491 void __iomem *reg;
494 reg = bank_reg(gpio, to_bank(offset), reg_tolerance);
498 val = readl(reg);
505 writel(val, reg);