Lines Matching defs:bank

105 				     const struct aspeed_sgpio_bank *bank,
110 return gpio->base + bank->val_regs + GPIO_VAL_VALUE;
112 return gpio->base + bank->rdata_reg;
114 return gpio->base + bank->irq_regs + GPIO_IRQ_ENABLE;
116 return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE0;
118 return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE1;
120 return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE2;
122 return gpio->base + bank->irq_regs + GPIO_IRQ_STATUS;
124 return gpio->base + bank->tolerance_regs;
137 unsigned int bank;
139 bank = GPIO_BANK(offset);
141 WARN_ON(bank >= ARRAY_SIZE(aspeed_sgpio_banks));
142 return &aspeed_sgpio_banks[bank];
172 const struct aspeed_sgpio_bank *bank = to_bank(offset);
180 rc = !!(ioread32(bank_reg(gpio, bank, reg)) & GPIO_BIT(offset));
190 const struct aspeed_sgpio_bank *bank = to_bank(offset);
199 addr_r = bank_reg(gpio, bank, reg_rdata);
200 addr_w = bank_reg(gpio, bank, reg_val);
254 const struct aspeed_sgpio_bank **bank,
264 *bank = to_bank(*offset);
270 const struct aspeed_sgpio_bank *bank;
277 irqd_to_aspeed_sgpio_data(d, &gpio, &bank, &bit, &offset);
279 status_addr = bank_reg(gpio, bank, reg_irq_status);
290 const struct aspeed_sgpio_bank *bank;
297 irqd_to_aspeed_sgpio_data(d, &gpio, &bank, &bit, &offset);
298 addr = bank_reg(gpio, bank, reg_irq_enable);
339 const struct aspeed_sgpio_bank *bank;
346 irqd_to_aspeed_sgpio_data(d, &gpio, &bank, &bit, &offset);
371 addr = bank_reg(gpio, bank, reg_irq_type0);
376 addr = bank_reg(gpio, bank, reg_irq_type1);
381 addr = bank_reg(gpio, bank, reg_irq_type2);
404 const struct aspeed_sgpio_bank *bank = &aspeed_sgpio_banks[i];
406 reg = ioread32(bank_reg(data, bank, reg_irq_status));
417 const struct aspeed_sgpio_bank *bank;
422 irqd_to_aspeed_sgpio_data(d, &gpio, &bank, &bit, &offset);
440 const struct aspeed_sgpio_bank *bank;
451 bank = &aspeed_sgpio_banks[i];
453 iowrite32(0x00000000, bank_reg(gpio, bank, reg_irq_enable));
455 iowrite32(0xffffffff, bank_reg(gpio, bank, reg_irq_status));
470 bank = &aspeed_sgpio_banks[i];
472 iowrite32(0x00000000, bank_reg(gpio, bank, reg_irq_type0));
474 iowrite32(0x00000000, bank_reg(gpio, bank, reg_irq_type1));
476 iowrite32(0x00000000, bank_reg(gpio, bank, reg_irq_type2));