Lines Matching refs:mm_gc
38 struct of_mm_gpio_chip *mm_gc;
43 mm_gc = &altera_gc->mmchip;
44 gpiochip_enable_irq(&mm_gc->gc, irqd_to_hwirq(d));
47 intmask = readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK);
50 writel(intmask, mm_gc->regs + ALTERA_GPIO_IRQ_MASK);
57 struct of_mm_gpio_chip *mm_gc;
62 mm_gc = &altera_gc->mmchip;
65 intmask = readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK);
68 writel(intmask, mm_gc->regs + ALTERA_GPIO_IRQ_MASK);
70 gpiochip_disable_irq(&mm_gc->gc, irqd_to_hwirq(d));
108 struct of_mm_gpio_chip *mm_gc;
110 mm_gc = to_of_mm_gpio_chip(gc);
112 return !!(readl(mm_gc->regs + ALTERA_GPIO_DATA) & BIT(offset));
117 struct of_mm_gpio_chip *mm_gc;
122 mm_gc = to_of_mm_gpio_chip(gc);
126 data_reg = readl(mm_gc->regs + ALTERA_GPIO_DATA);
131 writel(data_reg, mm_gc->regs + ALTERA_GPIO_DATA);
137 struct of_mm_gpio_chip *mm_gc;
142 mm_gc = to_of_mm_gpio_chip(gc);
147 gpio_ddr = readl(mm_gc->regs + ALTERA_GPIO_DIR);
149 writel(gpio_ddr, mm_gc->regs + ALTERA_GPIO_DIR);
158 struct of_mm_gpio_chip *mm_gc;
163 mm_gc = to_of_mm_gpio_chip(gc);
168 data_reg = readl(mm_gc->regs + ALTERA_GPIO_DATA);
173 writel(data_reg, mm_gc->regs + ALTERA_GPIO_DATA);
176 gpio_ddr = readl(mm_gc->regs + ALTERA_GPIO_DIR);
178 writel(gpio_ddr, mm_gc->regs + ALTERA_GPIO_DIR);
188 struct of_mm_gpio_chip *mm_gc;
195 mm_gc = &altera_gc->mmchip;
201 (readl(mm_gc->regs + ALTERA_GPIO_EDGE_CAP) &
202 readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK)))) {
203 writel(status, mm_gc->regs + ALTERA_GPIO_EDGE_CAP);
204 for_each_set_bit(i, &status, mm_gc->gc.ngpio)
215 struct of_mm_gpio_chip *mm_gc;
222 mm_gc = &altera_gc->mmchip;
227 status = readl(mm_gc->regs + ALTERA_GPIO_DATA);
228 status &= readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK);
230 for_each_set_bit(i, &status, mm_gc->gc.ngpio)