Lines Matching refs:adnp
21 struct adnp {
37 static int adnp_read(struct adnp *adnp, unsigned offset, uint8_t *value)
41 err = i2c_smbus_read_byte_data(adnp->client, offset);
43 dev_err(adnp->gpio.parent, "%s failed: %d\n",
52 static int adnp_write(struct adnp *adnp, unsigned offset, uint8_t value)
56 err = i2c_smbus_write_byte_data(adnp->client, offset, value);
58 dev_err(adnp->gpio.parent, "%s failed: %d\n",
68 struct adnp *adnp = gpiochip_get_data(chip);
69 unsigned int reg = offset >> adnp->reg_shift;
74 err = adnp_read(adnp, GPIO_PLR(adnp) + reg, &value);
81 static void __adnp_gpio_set(struct adnp *adnp, unsigned offset, int value)
83 unsigned int reg = offset >> adnp->reg_shift;
88 err = adnp_read(adnp, GPIO_PLR(adnp) + reg, &val);
97 adnp_write(adnp, GPIO_PLR(adnp) + reg, val);
102 struct adnp *adnp = gpiochip_get_data(chip);
104 mutex_lock(&adnp->i2c_lock);
105 __adnp_gpio_set(adnp, offset, value);
106 mutex_unlock(&adnp->i2c_lock);
111 struct adnp *adnp = gpiochip_get_data(chip);
112 unsigned int reg = offset >> adnp->reg_shift;
117 mutex_lock(&adnp->i2c_lock);
119 err = adnp_read(adnp, GPIO_DDR(adnp) + reg, &value);
125 err = adnp_write(adnp, GPIO_DDR(adnp) + reg, value);
129 err = adnp_read(adnp, GPIO_DDR(adnp) + reg, &value);
141 mutex_unlock(&adnp->i2c_lock);
148 struct adnp *adnp = gpiochip_get_data(chip);
149 unsigned int reg = offset >> adnp->reg_shift;
154 mutex_lock(&adnp->i2c_lock);
156 err = adnp_read(adnp, GPIO_DDR(adnp) + reg, &val);
162 err = adnp_write(adnp, GPIO_DDR(adnp) + reg, val);
166 err = adnp_read(adnp, GPIO_DDR(adnp) + reg, &val);
175 __adnp_gpio_set(adnp, offset, value);
179 mutex_unlock(&adnp->i2c_lock);
185 struct adnp *adnp = gpiochip_get_data(chip);
186 unsigned int num_regs = 1 << adnp->reg_shift, i, j;
192 mutex_lock(&adnp->i2c_lock);
194 err = adnp_read(adnp, GPIO_DDR(adnp) + i, &ddr);
198 err = adnp_read(adnp, GPIO_PLR(adnp) + i, &plr);
202 err = adnp_read(adnp, GPIO_IER(adnp) + i, &ier);
206 err = adnp_read(adnp, GPIO_ISR(adnp) + i, &isr);
210 mutex_unlock(&adnp->i2c_lock);
213 unsigned int bit = (i << adnp->reg_shift) + j;
239 mutex_unlock(&adnp->i2c_lock);
244 struct adnp *adnp = data;
247 num_regs = 1 << adnp->reg_shift;
250 unsigned int base = i << adnp->reg_shift, bit;
255 mutex_lock(&adnp->i2c_lock);
257 err = adnp_read(adnp, GPIO_PLR(adnp) + i, &level);
259 mutex_unlock(&adnp->i2c_lock);
263 err = adnp_read(adnp, GPIO_ISR(adnp) + i, &isr);
265 mutex_unlock(&adnp->i2c_lock);
269 err = adnp_read(adnp, GPIO_IER(adnp) + i, &ier);
271 mutex_unlock(&adnp->i2c_lock);
275 mutex_unlock(&adnp->i2c_lock);
278 changed = level ^ adnp->irq_level[i];
281 pending = changed & ((adnp->irq_fall[i] & ~level) |
282 (adnp->irq_rise[i] & level));
285 pending |= (adnp->irq_high[i] & level) |
286 (adnp->irq_low[i] & ~level);
293 child_irq = irq_find_mapping(adnp->gpio.irq.domain,
305 struct adnp *adnp = gpiochip_get_data(gc);
306 unsigned int reg = d->hwirq >> adnp->reg_shift;
309 adnp->irq_enable[reg] &= ~BIT(pos);
316 struct adnp *adnp = gpiochip_get_data(gc);
317 unsigned int reg = d->hwirq >> adnp->reg_shift;
321 adnp->irq_enable[reg] |= BIT(pos);
327 struct adnp *adnp = gpiochip_get_data(gc);
328 unsigned int reg = d->hwirq >> adnp->reg_shift;
332 adnp->irq_rise[reg] |= BIT(pos);
334 adnp->irq_rise[reg] &= ~BIT(pos);
337 adnp->irq_fall[reg] |= BIT(pos);
339 adnp->irq_fall[reg] &= ~BIT(pos);
342 adnp->irq_high[reg] |= BIT(pos);
344 adnp->irq_high[reg] &= ~BIT(pos);
347 adnp->irq_low[reg] |= BIT(pos);
349 adnp->irq_low[reg] &= ~BIT(pos);
357 struct adnp *adnp = gpiochip_get_data(gc);
359 mutex_lock(&adnp->irq_lock);
365 struct adnp *adnp = gpiochip_get_data(gc);
366 unsigned int num_regs = 1 << adnp->reg_shift, i;
368 mutex_lock(&adnp->i2c_lock);
371 adnp_write(adnp, GPIO_IER(adnp) + i, adnp->irq_enable[i]);
373 mutex_unlock(&adnp->i2c_lock);
374 mutex_unlock(&adnp->irq_lock);
378 .name = "gpio-adnp",
388 static int adnp_irq_setup(struct adnp *adnp)
390 unsigned int num_regs = 1 << adnp->reg_shift, i;
391 struct gpio_chip *chip = &adnp->gpio;
394 mutex_init(&adnp->irq_lock);
404 adnp->irq_enable = devm_kcalloc(chip->parent, num_regs, 6,
406 if (!adnp->irq_enable)
409 adnp->irq_level = adnp->irq_enable + (num_regs * 1);
410 adnp->irq_rise = adnp->irq_enable + (num_regs * 2);
411 adnp->irq_fall = adnp->irq_enable + (num_regs * 3);
412 adnp->irq_high = adnp->irq_enable + (num_regs * 4);
413 adnp->irq_low = adnp->irq_enable + (num_regs * 5);
420 err = adnp_read(adnp, GPIO_PLR(adnp) + i, &adnp->irq_level[i]);
425 err = adnp_write(adnp, GPIO_IER(adnp) + i, 0);
429 adnp->irq_enable[i] = 0x00;
432 err = devm_request_threaded_irq(chip->parent, adnp->client->irq,
435 dev_name(chip->parent), adnp);
438 adnp->client->irq, err);
445 static int adnp_gpio_setup(struct adnp *adnp, unsigned int num_gpios,
448 struct gpio_chip *chip = &adnp->gpio;
451 adnp->reg_shift = get_count_order(num_gpios) - 3;
464 chip->label = adnp->client->name;
465 chip->parent = &adnp->client->dev;
471 err = adnp_irq_setup(adnp);
487 err = devm_gpiochip_add_data(&adnp->client->dev, chip, adnp);
497 struct adnp *adnp;
505 adnp = devm_kzalloc(&client->dev, sizeof(*adnp), GFP_KERNEL);
506 if (!adnp)
509 mutex_init(&adnp->i2c_lock);
510 adnp->client = client;
512 err = adnp_gpio_setup(adnp, num_gpios, device_property_read_bool(dev, "interrupt-controller"));
516 i2c_set_clientdata(client, adnp);
522 { "gpio-adnp" },
528 { .compatible = "ad,gpio-adnp", },
535 .name = "gpio-adnp",