Lines Matching refs:dio48egpio
125 static void dio48e_regmap_lock(void *lock_arg) __acquires(&dio48egpio->lock)
127 struct dio48e_gpio *const dio48egpio = lock_arg;
130 raw_spin_lock_irqsave(&dio48egpio->lock, flags);
131 dio48egpio->flags = flags;
134 static void dio48e_regmap_unlock(void *lock_arg) __releases(&dio48egpio->lock)
136 struct dio48e_gpio *const dio48egpio = lock_arg;
138 raw_spin_unlock_irqrestore(&dio48egpio->lock, dio48egpio->flags);
141 static void pit_regmap_lock(void *lock_arg) __acquires(&dio48egpio->lock)
143 struct dio48e_gpio *const dio48egpio = lock_arg;
146 raw_spin_lock_irqsave(&dio48egpio->lock, flags);
147 dio48egpio->flags = flags;
149 iowrite8(0x00, dio48egpio->regs + DIO48E_ENABLE_COUNTER_TIMER_ADDRESSING);
152 static void pit_regmap_unlock(void *lock_arg) __releases(&dio48egpio->lock)
154 struct dio48e_gpio *const dio48egpio = lock_arg;
156 ioread8(dio48egpio->regs + DIO48E_DISABLE_COUNTER_TIMER_ADDRESSING);
158 raw_spin_unlock_irqrestore(&dio48egpio->lock, dio48egpio->flags);
166 struct dio48e_gpio *const dio48egpio = irq_drv_data;
167 const unsigned int prev_mask = dio48egpio->irq_mask;
176 dio48egpio->irq_mask = mask_buf;
180 err = regmap_write(dio48egpio->map, DIO48E_CLEAR_INTERRUPT, 0x00);
183 return regmap_write(dio48egpio->map, DIO48E_ENABLE_INTERRUPT, 0x00);
188 return regmap_read(dio48egpio->map, DIO48E_DISABLE_INTERRUPT, &val);
232 struct dio48e_gpio *dio48egpio;
241 dio48egpio = devm_kzalloc(dev, sizeof(*dio48egpio), GFP_KERNEL);
242 if (!dio48egpio)
249 dio48egpio->regs = regs;
251 raw_spin_lock_init(&dio48egpio->lock);
259 .lock_arg = dio48egpio,
273 dio48egpio->map = map;
282 .lock_arg = dio48egpio,
305 chip->irq_drv_data = dio48egpio;