Lines Matching refs:base
77 * System register base address (needed for configuring the
759 void __iomem *base)
761 iowrite16be(master->gpio_clk_vreg, base + HDR_CLOCK_GPIO_VADDR);
762 iowrite16be(master->gpio_clk_dreg, base + HDR_CLOCK_GPIO_DADDR);
763 iowrite16be(master->gpio_dat_vreg, base + HDR_DATA_GPIO_VADDR);
764 iowrite16be(master->gpio_dat_dreg, base + HDR_DATA_GPIO_DADDR);
765 iowrite16be(master->gpio_tra_vreg, base + HDR_TRANS_GPIO_VADDR);
766 iowrite16be(master->gpio_tra_dreg, base + HDR_TRANS_GPIO_DADDR);
767 iowrite8(master->gpio_clk_bit, base + HDR_CLOCK_GPIO_BIT);
768 iowrite8(master->gpio_dat_bit, base + HDR_DATA_GPIO_BIT);
769 iowrite8(master->gpio_tra_bit, base + HDR_TRANS_GPIO_BIT);
774 void __iomem *base = master->cf_mem + HDR_OFFSET;
776 setup_common_fw_config(master, base);
777 iowrite32be(FW_CONTROL_USE_STOP, base + HDR_FW_CONTROL);
782 void __iomem *base = master->cf_mem + HDR_OFFSET;
784 setup_common_fw_config(master, base);
785 iowrite32be(FW_CONTROL_CONT_CLOCK|FW_CONTROL_DUMMY_RD, base + HDR_FW_CONTROL);