Lines Matching defs:aspeed
97 static int __opb_write(struct fsi_master_aspeed *aspeed, u32 addr,
100 void __iomem *base = aspeed->base;
134 static int opb_writeb(struct fsi_master_aspeed *aspeed, u32 addr, u8 val)
136 return __opb_write(aspeed, addr, val, XFER_BYTE);
139 static int opb_writew(struct fsi_master_aspeed *aspeed, u32 addr, __be16 val)
141 return __opb_write(aspeed, addr, (__force u16)val, XFER_HALFWORD);
144 static int opb_writel(struct fsi_master_aspeed *aspeed, u32 addr, __be32 val)
146 return __opb_write(aspeed, addr, (__force u32)val, XFER_FULLWORD);
149 static int __opb_read(struct fsi_master_aspeed *aspeed, uint32_t addr,
152 void __iomem *base = aspeed->base;
206 static int opb_readl(struct fsi_master_aspeed *aspeed, uint32_t addr, __be32 *out)
208 return __opb_read(aspeed, addr, XFER_FULLWORD, out);
211 static int opb_readw(struct fsi_master_aspeed *aspeed, uint32_t addr, __be16 *out)
213 return __opb_read(aspeed, addr, XFER_HALFWORD, (void *)out);
216 static int opb_readb(struct fsi_master_aspeed *aspeed, uint32_t addr, u8 *out)
218 return __opb_read(aspeed, addr, XFER_BYTE, (void *)out);
221 static int check_errors(struct fsi_master_aspeed *aspeed, int err)
228 opb_readl(aspeed, ctrl_base + FSI_MRESP0, &mresp0);
229 opb_readl(aspeed, ctrl_base + FSI_MSTAP0, &mstap0);
230 opb_readl(aspeed, ctrl_base + FSI_MESRB0, &mesrb0);
242 ret = opb_writel(aspeed, ctrl_base + FSI_MRESP0,
258 struct fsi_master_aspeed *aspeed = to_fsi_master_aspeed(master);
267 mutex_lock(&aspeed->lock);
271 ret = opb_readb(aspeed, fsi_base + addr, val);
274 ret = opb_readw(aspeed, fsi_base + addr, val);
277 ret = opb_readl(aspeed, fsi_base + addr, val);
284 ret = check_errors(aspeed, ret);
286 mutex_unlock(&aspeed->lock);
293 struct fsi_master_aspeed *aspeed = to_fsi_master_aspeed(master);
302 mutex_lock(&aspeed->lock);
306 ret = opb_writeb(aspeed, fsi_base + addr, *(u8 *)val);
309 ret = opb_writew(aspeed, fsi_base + addr, *(__be16 *)val);
312 ret = opb_writel(aspeed, fsi_base + addr, *(__be32 *)val);
319 ret = check_errors(aspeed, ret);
321 mutex_unlock(&aspeed->lock);
328 struct fsi_master_aspeed *aspeed = to_fsi_master_aspeed(master);
337 mutex_lock(&aspeed->lock);
340 ret = opb_writel(aspeed, ctrl_base + FSI_MCENP0 + (4 * idx), reg);
344 ret = opb_writel(aspeed, ctrl_base + FSI_MSENP0 + (4 * idx), reg);
350 mutex_unlock(&aspeed->lock);
378 struct fsi_master_aspeed *aspeed =
381 kfree(aspeed);
395 static int aspeed_master_init(struct fsi_master_aspeed *aspeed)
401 opb_writel(aspeed, ctrl_base + FSI_MRESP0, reg);
406 opb_writel(aspeed, ctrl_base + FSI_MRESP0, reg);
409 opb_writel(aspeed, ctrl_base + FSI_MECTRL, reg);
415 dev_info(aspeed->dev, "mmode set to %08x (divisor %d)\n",
417 opb_writel(aspeed, ctrl_base + FSI_MMODE, reg);
420 opb_writel(aspeed, ctrl_base + FSI_MDLYR, reg);
423 opb_writel(aspeed, ctrl_base + FSI_MSENP0, reg);
428 opb_writel(aspeed, ctrl_base + FSI_MCENP0, reg);
430 opb_readl(aspeed, ctrl_base + FSI_MAEB, NULL);
433 opb_writel(aspeed, ctrl_base + FSI_MRESP0, reg);
435 opb_readl(aspeed, ctrl_base + FSI_MLEVP0, NULL);
439 opb_writel(aspeed, ctrl_base + FSI_MRESB0, reg);
442 opb_writel(aspeed, ctrl_base + FSI_MRESB0, reg);
450 struct fsi_master_aspeed *aspeed = dev_get_drvdata(dev);
453 mutex_lock(&aspeed->lock);
454 gpiod_set_value(aspeed->cfam_reset_gpio, 1);
456 gpiod_set_value(aspeed->cfam_reset_gpio, 0);
458 opb_writel(aspeed, ctrl_base + FSI_MRESP0, cpu_to_be32(FSI_MRESP_RST_ALL_MASTER));
459 mutex_unlock(&aspeed->lock);
467 static int setup_cfam_reset(struct fsi_master_aspeed *aspeed)
469 struct device *dev = aspeed->dev;
479 aspeed->cfam_reset_gpio = gpio;
539 struct fsi_master_aspeed *aspeed;
549 aspeed = kzalloc(sizeof(*aspeed), GFP_KERNEL);
550 if (!aspeed)
553 aspeed->dev = &pdev->dev;
555 aspeed->base = devm_platform_ioremap_resource(pdev, 0);
556 if (IS_ERR(aspeed->base)) {
557 rc = PTR_ERR(aspeed->base);
561 aspeed->clk = devm_clk_get(aspeed->dev, NULL);
562 if (IS_ERR(aspeed->clk)) {
563 dev_err(aspeed->dev, "couldn't get clock\n");
564 rc = PTR_ERR(aspeed->clk);
567 rc = clk_prepare_enable(aspeed->clk);
569 dev_err(aspeed->dev, "couldn't enable clock\n");
573 rc = setup_cfam_reset(aspeed);
578 writel(0x1, aspeed->base + OPB_CLK_SYNC);
580 aspeed->base + OPB_IRQ_MASK);
583 writel(0x10, aspeed->base + OPB_RETRY_COUNTER);
585 writel(ctrl_base, aspeed->base + OPB_CTRL_BASE);
586 writel(fsi_base, aspeed->base + OPB_FSI_BASE);
589 writel(0x00030b1b, aspeed->base + OPB0_READ_ORDER1);
592 writel(0x0011101b, aspeed->base + OPB0_WRITE_ORDER1);
593 writel(0x0c330f3f, aspeed->base + OPB0_WRITE_ORDER2);
600 writel(0x1, aspeed->base + OPB0_SELECT);
602 rc = opb_readl(aspeed, ctrl_base + FSI_MVER, &raw);
612 aspeed->master.dev.parent = &pdev->dev;
613 aspeed->master.dev.release = aspeed_master_release;
614 aspeed->master.dev.of_node = of_node_get(dev_of_node(&pdev->dev));
616 aspeed->master.n_links = links;
617 aspeed->master.read = aspeed_master_read;
618 aspeed->master.write = aspeed_master_write;
619 aspeed->master.send_break = aspeed_master_break;
620 aspeed->master.term = aspeed_master_term;
621 aspeed->master.link_enable = aspeed_master_link_enable;
623 dev_set_drvdata(&pdev->dev, aspeed);
625 mutex_init(&aspeed->lock);
626 aspeed_master_init(aspeed);
628 rc = fsi_master_register(&aspeed->master);
639 get_device(&aspeed->master.dev);
643 clk_disable_unprepare(aspeed->clk);
645 kfree(aspeed);
651 struct fsi_master_aspeed *aspeed = platform_get_drvdata(pdev);
653 fsi_master_unregister(&aspeed->master);
654 clk_disable_unprepare(aspeed->clk);
660 { .compatible = "aspeed,ast2600-fsi-master" },
667 .name = "fsi-master-aspeed",