Lines Matching defs:ctrl_reg
337 u32 ctrl_reg;
346 ctrl_reg = socfpga_fpga_readl(priv, SOCFPGA_FPGMGR_CTL_OFST);
347 ctrl_reg &= ~SOCFPGA_FPGMGR_CTL_CDRATIO_MASK;
348 ctrl_reg &= ~SOCFPGA_FPGMGR_CTL_CFGWDTH_MASK;
349 ctrl_reg |= cfgmgr_modes[mode].ctrl;
352 ctrl_reg &= ~SOCFPGA_FPGMGR_CTL_NCE;
353 socfpga_fpga_writel(priv, SOCFPGA_FPGMGR_CTL_OFST, ctrl_reg);
361 u32 ctrl_reg, status;
378 ctrl_reg = socfpga_fpga_readl(priv, SOCFPGA_FPGMGR_CTL_OFST);
379 ctrl_reg |= SOCFPGA_FPGMGR_CTL_NCFGPULL;
380 socfpga_fpga_writel(priv, SOCFPGA_FPGMGR_CTL_OFST, ctrl_reg);
386 ctrl_reg &= ~SOCFPGA_FPGMGR_CTL_NCFGPULL;
387 socfpga_fpga_writel(priv, SOCFPGA_FPGMGR_CTL_OFST, ctrl_reg);