Lines Matching refs:status
46 #define FME_PR_STS_PR_STS BIT_ULL(16) /* PR operation status */
48 #define FME_PR_STS_PR_CTRLR_STS GENMASK_ULL(22, 20) /* Controller status */
49 #define FME_PR_STS_PR_HOST_STS GENMASK_ULL(27, 24) /* PR host status */
77 u64 status = 0;
80 status |= FPGA_MGR_STATUS_OPERATION_ERR;
82 status |= FPGA_MGR_STATUS_CRC_ERR;
84 status |= FPGA_MGR_STATUS_INCOMPATIBLE_IMAGE_ERR;
86 status |= FPGA_MGR_STATUS_IP_PROTOCOL_ERR;
88 status |= FPGA_MGR_STATUS_FIFO_OVERFLOW_ERR;
90 return status;
242 dev_dbg(dev, "PR operation complete, checking status\n");
266 .status = fme_mgr_status,