Lines Matching refs:phys
77 static inline void tegra_ivc_invalidate(struct tegra_ivc *ivc, dma_addr_t phys)
82 dma_sync_single_for_cpu(ivc->peer, phys, TEGRA_IVC_ALIGN,
86 static inline void tegra_ivc_flush(struct tegra_ivc *ivc, dma_addr_t phys)
91 dma_sync_single_for_device(ivc->peer, phys, TEGRA_IVC_ALIGN,
198 tegra_ivc_invalidate(ivc, ivc->rx.phys + offset);
218 tegra_ivc_invalidate(ivc, ivc->tx.phys + offset);
240 dma_addr_t phys,
247 return phys + offset;
251 dma_addr_t phys,
259 phys = tegra_ivc_frame_phys(ivc, phys, frame) + offset;
261 dma_sync_single_for_cpu(ivc->peer, phys, size, DMA_FROM_DEVICE);
265 dma_addr_t phys,
273 phys = tegra_ivc_frame_phys(ivc, phys, frame) + offset;
275 dma_sync_single_for_device(ivc->peer, phys, size, DMA_TO_DEVICE);
296 tegra_ivc_invalidate_frame(ivc, ivc->rx.phys, ivc->rx.position, 0,
320 tegra_ivc_flush(ivc, ivc->rx.phys + rx);
333 tegra_ivc_invalidate(ivc, ivc->rx.phys + tx);
366 tegra_ivc_flush_frame(ivc, ivc->tx.phys, ivc->tx.position, 0,
376 tegra_ivc_flush(ivc, ivc->tx.phys + tx);
389 tegra_ivc_invalidate(ivc, ivc->tx.phys + rx);
403 tegra_ivc_flush(ivc, ivc->tx.phys + offset);
434 tegra_ivc_invalidate(ivc, ivc->rx.phys + offset);
469 tegra_ivc_flush(ivc, ivc->tx.phys + offset);
509 tegra_ivc_flush(ivc, ivc->tx.phys + offset);
533 tegra_ivc_flush(ivc, ivc->tx.phys + offset);
673 ivc->rx.phys = dma_map_single(peer, iosys_map_get_vaddr(rx), queue_size,
675 if (dma_mapping_error(peer, ivc->rx.phys))
678 ivc->tx.phys = dma_map_single(peer, iosys_map_get_vaddr(tx), queue_size,
680 if (dma_mapping_error(peer, ivc->tx.phys)) {
681 dma_unmap_single(peer, ivc->rx.phys, queue_size,
686 ivc->rx.phys = rx_phys;
687 ivc->tx.phys = tx_phys;
715 dma_unmap_single(ivc->peer, ivc->rx.phys, size,
717 dma_unmap_single(ivc->peer, ivc->tx.phys, size,