Lines Matching refs:reg

66 static void xgene_edac_pcp_rd(struct xgene_edac *edac, u32 reg, u32 *val)
68 	*val = readl(edac->pcp_csr + reg);
71 static void xgene_edac_pcp_clrbits(struct xgene_edac *edac, u32 reg,
77 	val = readl(edac->pcp_csr + reg);
79 	writel(val, edac->pcp_csr + reg);
83 static void xgene_edac_pcp_setbits(struct xgene_edac *edac, u32 reg,
89 	val = readl(edac->pcp_csr + reg);
91 	writel(val, edac->pcp_csr + reg);
179 	u32 reg;
193 		reg = readl(ctx->mcu_csr + MCUESRR0 + rank * MCU_RANK_STRIDE);
196 		if (reg & (MCU_ESRR_DEMANDUCERR_MASK |
207 		if (reg & MCU_ESRR_CERR_MASK) {
230 		writel(reg, ctx->mcu_csr + MCUESRR0 + rank * MCU_RANK_STRIDE);
234 	reg = readl(ctx->mcu_csr + MCUGESR);
235 	if (reg) {
236 		if (reg & MCU_GESR_ADDRNOMATCH_ERR_MASK)
239 		if (reg & MCU_GESR_ADDRMULTIMATCH_ERR_MASK)
243 		writel(reg, ctx->mcu_csr + MCUGESR);
311 	unsigned int reg;
314 	if (regmap_read(ctx->edac->csw_map, CSW_CSWCR, &reg))
317 	if (reg & CSW_CSWCR_DUALMCB_MASK) {
322 		if (regmap_read(ctx->edac->mcbb_map, MCBADDRMR, &reg))
324 		mcu_mask = (reg & MCBADDRMR_DUALMCU_MODE_MASK) ? 0xF : 0x5;
330 		if (regmap_read(ctx->edac->mcba_map, MCBADDRMR, &reg))
332 		mcu_mask = (reg & MCBADDRMR_DUALMCU_MODE_MASK) ? 0x3 : 0x1;
1393 	u32 reg;
1397 	reg = readl(ctx->dev_csr + XGICTRANSERRINTSTS);
1398 	if (!reg)
1401 	if (reg & RD_ACCESS_ERR_MASK)
1403 	if (reg & M_RD_ACCESS_ERR_MASK)
1405 	if (reg & WR_ACCESS_ERR_MASK)
1407 	if (reg & M_WR_ACCESS_ERR_MASK)
1413 	writel(reg, ctx->dev_csr + XGICTRANSERRINTSTS);
1417 	reg = readl(ctx->dev_csr + GLBL_ERR_STS);
1418 	if (!reg)
1420 	if (reg & SEC_ERR_MASK) {
1429 	if (reg & MSEC_ERR_MASK) {
1438 	if (reg & (SEC_ERR_MASK | MSEC_ERR_MASK))
1441 	if (reg & DED_ERR_MASK) {
1450 	if (reg & MDED_ERR_MASK) {
1459 	if (reg & (DED_ERR_MASK | MDED_ERR_MASK))
1468 	u32 reg;
1481 	if (regmap_read(ctx->edac->rb_map, RBCSR, &reg))
1483 	if (reg & STICKYERR_MASK) {
1487 		if (regmap_read(ctx->edac->rb_map, RBEIR, &reg))
1489 		write = reg & WRITE_ACCESS_MASK ? 1 : 0;
1490 		if (reg & AGENT_OFFLINE_ERR_MASK)
1494 		if (reg & UNIMPL_RBPAGE_ERR_MASK)
1498 		if (reg & WORD_ALIGNED_ERR_MASK)
1502 		if (reg & PAGE_ACCESS_ERR_MASK)
1514 	reg = readl(ctx->dev_csr + IOBBATRANSERRINTSTS);
1515 	if (!reg)
1519 	if (reg & WRERR_RESP_MASK)
1521 	if (reg & M_WRERR_RESP_MASK)
1524 	if (reg & XGIC_POISONED_REQ_MASK)
1526 	if (reg & M_XGIC_POISONED_REQ_MASK)
1529 	if (reg & RBM_POISONED_REQ_MASK)
1531 	if (reg & M_RBM_POISONED_REQ_MASK)
1534 	if (reg & WDATA_CORRUPT_MASK)
1536 	if (reg & M_WDATA_CORRUPT_MASK)
1538 	if (reg & TRANS_CORRUPT_MASK)
1540 	if (reg & M_TRANS_CORRUPT_MASK)
1542 	if (reg & RIDRAM_CORRUPT_MASK)
1545 	if (reg & M_RIDRAM_CORRUPT_MASK)
1548 	if (reg & WIDRAM_CORRUPT_MASK)
1551 	if (reg & M_WIDRAM_CORRUPT_MASK)
1554 	if (reg & ILLEGAL_ACCESS_MASK)
1557 	if (reg & M_ILLEGAL_ACCESS_MASK)
1566 	if (reg & WRERR_RESP_MASK)
1569 	writel(reg, ctx->dev_csr + IOBBATRANSERRINTSTS);
1577 	u32 reg;
1580 	reg = readl(ctx->dev_csr + IOBPATRANSERRINTSTS);
1581 	if (!reg)
1584 	if (reg & IOBPA_RDATA_CORRUPT_MASK)
1586 	if (reg & IOBPA_M_RDATA_CORRUPT_MASK)
1589 	if (reg & IOBPA_WDATA_CORRUPT_MASK)
1591 	if (reg & IOBPA_M_WDATA_CORRUPT_MASK)
1594 	if (reg & IOBPA_TRANS_CORRUPT_MASK)
1596 	if (reg & IOBPA_M_TRANS_CORRUPT_MASK)
1598 	if (reg & IOBPA_REQIDRAM_CORRUPT_MASK)
1600 	if (reg & IOBPA_M_REQIDRAM_CORRUPT_MASK)
1603 	writel(reg, ctx->dev_csr + IOBPATRANSERRINTSTS);
1607 	reg = readl(ctx->dev_csr + IOBAXIS0TRANSERRINTSTS);
1608 	if (!reg)
1614 		reg & IOBAXIS0_M_ILLEGAL_ACCESS_MASK ? "Multiple " : "",
1617 	writel(reg, ctx->dev_csr + IOBAXIS0TRANSERRINTSTS);
1621 	reg = readl(ctx->dev_csr + IOBAXIS1TRANSERRINTSTS);
1622 	if (!reg)
1628 		reg & IOBAXIS0_M_ILLEGAL_ACCESS_MASK ? "Multiple " : "",
1631 	writel(reg, ctx->dev_csr + IOBAXIS1TRANSERRINTSTS);
1640 	u32 reg;
1645 	xgene_edac_pcp_rd(ctx->edac, MEMERRINTSTS, &reg);
1648 	      (pcp_lp_stat & CSW_SWITCH_TRACE_ERR_MASK) || reg))
1666 	if (!reg)
1672 			reg);
1677 		if (reg & (1 << i)) {