Lines Matching defs:channels
286 #define NUM_CHANNELS 6 /* Max channels per MC */
289 #define KNL_MAX_CHANNELS 6 /* KNL max num. of PCI channels */
514 * - 3 DDR3 channels, 2 DPC per channel
517 * - 4 DDR4 channels, 3 DPC per channel
520 * - 4 DDR4 channels, 3 DPC per channel
525 * - each scalable memory buffer supports 4 DDR3/DDR4 channels, 3 DPC
584 * KNL's memory channels are swizzled between memory controllers.
631 * - 2 DDR3 channels, 2 DPC per channel
634 * - 4 DDR4 channels, 3 DPC per channel
637 * - 4 DDR4 channels, 3 DPC per channel
642 * - each scalable memory buffer supports 4 DDR3/DDR4 channels, 3 DPC
1242 * physical DRAM channels modules.)
1343 * @mc_sizes: Output sizes of channels (must have space for KNL_MAX_CHANNELS
1530 /* Figure out which channels participate in interleave. */
1591 int channels = pvt->info.type == KNIGHTS_LANDING ? KNL_MAX_CHANNELS
1611 for (i = 0; i < channels; i++) {
3004 * MC0 channels 0-2 are device 9 function 2-4,
3005 * MC1 channels 3-5 are device 8 function 2-4.