Lines Matching refs:mcopt1
808 * @mcopt1: The 32-bit Memory Controller Option 1 register value
823 static enum dev_type ppc4xx_edac_get_dtype(u32 mcopt1)
825 switch (mcopt1 & SDRAM_MCOPT1_WDTH_MASK) {
837 * @mcopt1: The 32-bit Memory Controller Option 1 register value
846 static enum mem_type ppc4xx_edac_get_mtype(u32 mcopt1)
848 bool rden = ((mcopt1 & SDRAM_MCOPT1_RDEN_MASK) == SDRAM_MCOPT1_RDEN);
850 switch (mcopt1 & SDRAM_MCOPT1_DDR_TYPE_MASK) {
865 * @mcopt1: The 32-bit Memory Controller Option 1 register value
876 static int ppc4xx_edac_init_csrows(struct mem_ctl_info *mci, u32 mcopt1)
888 mtype = ppc4xx_edac_get_mtype(mcopt1);
889 dtype = ppc4xx_edac_get_dtype(mcopt1);
983 * @mcopt1: The 32-bit Memory Controller Option 1 register value
995 const dcr_host_t *dcr_host, u32 mcopt1)
998 const u32 memcheck = (mcopt1 & SDRAM_MCOPT1_MCHK_MASK);
1058 status = ppc4xx_edac_init_csrows(mci, mcopt1);
1212 u32 mcopt1, memcheck;
1247 mcopt1 = mfsdram(&dcr_host, SDRAM_MCOPT1);
1248 memcheck = (mcopt1 & SDRAM_MCOPT1_MCHK_MASK);
1278 status = ppc4xx_edac_mc_init(mci, op, &dcr_host, mcopt1);