Lines Matching refs:out_be32
59 out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR, err_detect);
78 out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR, err_detect);
108 out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR, err_detect);
111 out_be32(pdata->pci_vbase + MPC85XX_PCI_GAS_TIMR, err_cap_stat | 0x1);
226 out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_ADDR, ~0);
229 out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_EN, 0);
235 out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_CAP_DR, 0x40);
241 out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_EN, ~0x40);
245 out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR, ~0);
248 out_be32(pdata->pci_vbase + MPC85XX_PCI_GAS_TIMR, 0x1);
283 out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_EN, ~0
285 out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_ADDR, 0
310 out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_ADDR, orig_pci_err_cap_dr);
311 out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_EN, orig_pci_err_en);
371 out_be32(pdata->l2_vbase + MPC85XX_L2_ERRINJHI,
384 out_be32(pdata->l2_vbase + MPC85XX_L2_ERRINJLO,
397 out_be32(pdata->l2_vbase + MPC85XX_L2_ERRINJCTL,
465 out_be32(pdata->l2_vbase + MPC85XX_L2_ERRDET, err_detect);
538 out_be32(pdata->l2_vbase + MPC85XX_L2_ERRDET, ~0);
543 out_be32(pdata->l2_vbase + MPC85XX_L2_ERRDIS, 0);
576 out_be32(pdata->l2_vbase + MPC85XX_L2_ERRINTEN, L2_EIE_MASK);
602 out_be32(pdata->l2_vbase + MPC85XX_L2_ERRINTEN, 0);
606 out_be32(pdata->l2_vbase + MPC85XX_L2_ERRDIS, orig_l2_err_disable);