Lines Matching defs:channel

22  * 2 channels operating in lockstep no-mirror mode. Each channel can have up to
83 #define FERR_FAT_FBDCHAN (3<<28) /* channel index where the highest-order error occurred */
354 int maxdimmperch; /* Max DIMMs per channel */
518 int channel;
542 channel = branch;
553 type, rank, channel, channel + 1, branch >> 1, bank,
583 int channel;
608 channel = 0;
610 channel = 1;
612 /* Convert channel to be based from zero, instead of
614 channel += branch;
626 rank, channel, branch >> 1, bank,
637 branch >> 1, channel % 2, rank,
830 * knowing which channel is in question
833 * b0_ambpresent0 for channel '0'
834 * b0_ambpresent1 for channel '1'
835 * b1_ambpresent0 for channel '2'
836 * b1_ambpresent1 for channel '3'
838 static int determine_amb_present_reg(struct i5400_pvt *pvt, int channel)
842 if (channel < CHANNELS_PER_BRANCH) {
843 if (channel & 0x1)
848 if (channel & 0x1)
858 * determine_mtr(pvt, dimm, channel)
860 * return the proper MTR register as determine by the dimm and desired channel
862 static int determine_mtr(struct i5400_pvt *pvt, int dimm, int channel)
878 if (channel < CHANNELS_PER_BRANCH)
919 static void handle_channel(struct i5400_pvt *pvt, int dimm, int channel,
926 mtr = determine_mtr(pvt, dimm, channel);
928 amb_present_reg = determine_amb_present_reg(pvt, channel);
963 int channel, branch;
997 for (channel = 0; channel < pvt->maxch; channel++) {
998 dinfo = &pvt->dimm_info[dimm][channel];
999 handle_channel(pvt, dimm, channel, dinfo);
1018 /* now output the 'channel' labels */
1022 for (channel = 0; channel < pvt->maxch; channel++) {
1023 n = snprintf(p, space, "channel %d | ", channel);
1172 int channel, slot;
1179 * FIXME: remove pvt->dimm_info[slot][channel] and use the 3
1182 for (channel = 0; channel < mci->layers[0].size * mci->layers[1].size;
1183 channel++) {
1185 mtr = determine_mtr(pvt, slot, channel);
1191 dimm = edac_get_dimm(mci, channel / 2, channel % 2, slot);
1193 size_mb = pvt->dimm_info[slot][channel].megabytes;
1195 edac_dbg(2, "dimm (branch %d channel %d slot %d): %d.%03d GB\n",
1196 channel / 2, channel % 2, slot,
1273 * This drivers uses the DIMM slot as "csrow" and the rest as "channel".