Lines Matching refs:base
72 void __iomem *base;
134 data_h = readl(drvdata->base + SDRAM_ERR_DATA_H_REG);
135 data_l = readl(drvdata->base + SDRAM_ERR_DATA_L_REG);
136 recv_ecc = readl(drvdata->base + SDRAM_ERR_RECV_ECC_REG);
137 calc_ecc = readl(drvdata->base + SDRAM_ERR_CALC_ECC_REG);
138 addr = readl(drvdata->base + SDRAM_ERR_ADDR_REG);
139 cnt_sbe = readl(drvdata->base + SDRAM_ERR_SBE_COUNT_REG);
140 cnt_dbe = readl(drvdata->base + SDRAM_ERR_DBE_COUNT_REG);
141 cause_err = readl(drvdata->base + SDRAM_ERR_CAUSE_ERR_REG);
142 cause_msg = readl(drvdata->base + SDRAM_ERR_CAUSE_MSG_REG);
146 drvdata->base + SDRAM_ERR_CAUSE_ERR_REG);
148 drvdata->base + SDRAM_ERR_CAUSE_MSG_REG);
152 writel(0, drvdata->base + SDRAM_ERR_SBE_COUNT_REG);
154 writel(0, drvdata->base + SDRAM_ERR_DBE_COUNT_REG);
226 config = readl(drvdata->base + SDRAM_CONFIG_REG);
234 addr_ctrl = readl(drvdata->base + SDRAM_ADDR_CTRL_REG);
235 rank_ctrl = readl(drvdata->base + SDRAM_RANK_CTRL_REG);
289 void __iomem *base;
292 base = devm_platform_ioremap_resource(pdev, 0);
293 if (IS_ERR(base)) {
295 return PTR_ERR(base);
298 config = readl(base + SDRAM_CONFIG_REG);
313 drvdata->base = base;
335 writel(1 << SDRAM_ERR_CTRL_THR_OFFSET, drvdata->base + SDRAM_ERR_CTRL_REG);
338 writel(~(SDRAM_ERR_CAUSE_DBE_MASK | SDRAM_ERR_CAUSE_SBE_MASK), drvdata->base + SDRAM_ERR_CAUSE_ERR_REG);
339 writel(~(SDRAM_ERR_CAUSE_DBE_MASK | SDRAM_ERR_CAUSE_SBE_MASK), drvdata->base + SDRAM_ERR_CAUSE_MSG_REG);
342 writel(0, drvdata->base + SDRAM_ERR_SBE_COUNT_REG);
343 writel(0, drvdata->base + SDRAM_ERR_DBE_COUNT_REG);
377 void __iomem *base;
394 writel(0, drvdata->base + AURORA_ERR_INJECT_CTL_REG);
395 writel(drvdata->inject_mask, drvdata->base + AURORA_ERR_INJECT_MASK_REG);
396 writel(drvdata->inject_addr | drvdata->inject_ctl, drvdata->base + AURORA_ERR_INJECT_CTL_REG);
409 cnt = readl(drvdata->base + AURORA_ERR_CNT_REG);
410 attr_cap = readl(drvdata->base + AURORA_ERR_ATTR_CAP_REG);
411 addr_cap = readl(drvdata->base + AURORA_ERR_ADDR_CAP_REG);
412 way_cap = readl(drvdata->base + AURORA_ERR_WAY_CAP_REG);
418 writel(AURORA_ERR_CNT_CLR, drvdata->base + AURORA_ERR_CNT_REG);
467 writel(AURORA_ERR_ATTR_CAP_VALID, drvdata->base + AURORA_ERR_ATTR_CAP_REG);
511 void __iomem *base;
513 base = devm_platform_ioremap_resource(pdev, 0);
514 if (IS_ERR(base)) {
516 return PTR_ERR(base);
519 l2x0_aux_ctrl = readl(base + L2X0_AUX_CTRL);
531 drvdata->base = base;
542 writel(AURORA_ERR_CNT_CLR, drvdata->base + AURORA_ERR_CNT_REG);
543 writel(AURORA_ERR_ATTR_CAP_VALID, drvdata->base + AURORA_ERR_ATTR_CAP_REG);