Lines Matching refs:umc_base
1608 u32 i, tmp, umc_base;
1611 umc_base = get_umc_base(i);
1619 amd_smn_read(pvt->mc_node_id, umc_base + UMCCH_ECC_BAD_SYMBOL, &tmp);
1622 amd_smn_read(pvt->mc_node_id, umc_base + UMCCH_UMC_CAP, &tmp);
1638 umc_base + get_umc_reg(pvt, UMCCH_ADDR_CFG),
3171 u32 i, umc_base;
3176 umc_base = get_umc_base(i);
3179 amd_smn_read(nid, umc_base + get_umc_reg(pvt, UMCCH_DIMM_CFG), &umc->dimm_cfg);
3180 amd_smn_read(nid, umc_base + UMCCH_UMC_CFG, &umc->umc_cfg);
3181 amd_smn_read(nid, umc_base + UMCCH_SDP_CTRL, &umc->sdp_ctrl);
3182 amd_smn_read(nid, umc_base + UMCCH_ECC_CTRL, &umc->ecc_ctrl);
3183 amd_smn_read(nid, umc_base + UMCCH_UMC_CAP_HI, &umc->umc_cap_hi);
3909 u32 i, umc_base;
3913 umc_base = gpu_get_umc_base(i, 0);
3916 amd_smn_read(nid, umc_base + UMCCH_UMC_CFG, &umc->umc_cfg);
3917 amd_smn_read(nid, umc_base + UMCCH_SDP_CTRL, &umc->sdp_ctrl);
3918 amd_smn_read(nid, umc_base + UMCCH_ECC_CTRL, &umc->ecc_ctrl);