Lines Matching defs:dclr
1424 static void debug_dump_dramcfg_low(struct amd64_pvt *pvt, u32 dclr, int chan)
1426 edac_dbg(1, "F2x%d90 (DRAM Cfg Low): 0x%08x\n", chan, dclr);
1439 (dclr & BIT(19)) ? "yes" : "no");
1443 (dclr & BIT(8)) ? "enabled" : "disabled");
1447 (dclr & BIT(11)) ? "128b" : "64b");
1450 (dclr & BIT(12)) ? "yes" : "no",
1451 (dclr & BIT(13)) ? "yes" : "no",
1452 (dclr & BIT(14)) ? "yes" : "no",
1453 (dclr & BIT(15)) ? "yes" : "no");
2114 u32 dclr = dct ? pvt->dclr1 : pvt->dclr0;
2118 return ddr2_cs_size(cs_mode, dclr & WIDTH_128);
2218 u32 dclr = dct ? pvt->dclr1 : pvt->dclr0;
2223 return ddr3_cs_size(cs_mode, dclr & WIDTH_128);
2225 return ddr2_cs_size(cs_mode, dclr & WIDTH_128);