Lines Matching refs:csr_ring
296 * @csr_ring: base for DMA ring register access
308 void __iomem *csr_ring;
1036 iowrite32(ring->num, ring->pdma->csr_ring + XGENE_DMA_RING_STATE);
1039 iowrite32(ring->state[i], ring->pdma->csr_ring +
1083 ring->pdma->csr_ring + XGENE_DMA_RING_ID);
1087 ring->pdma->csr_ring + XGENE_DMA_RING_ID_BUF);
1101 val = ioread32(ring->pdma->csr_ring + XGENE_DMA_RING_NE_INT_MODE);
1103 iowrite32(val, ring->pdma->csr_ring + XGENE_DMA_RING_NE_INT_MODE);
1112 val = ioread32(ring->pdma->csr_ring +
1115 iowrite32(val, ring->pdma->csr_ring +
1121 iowrite32(ring_id, ring->pdma->csr_ring + XGENE_DMA_RING_ID);
1123 iowrite32(0, ring->pdma->csr_ring + XGENE_DMA_RING_ID_BUF);
1366 if (ioread32(pdma->csr_ring + XGENE_DMA_RING_CLKEN) &&
1367 (!ioread32(pdma->csr_ring + XGENE_DMA_RING_SRST)))
1370 iowrite32(0x3, pdma->csr_ring + XGENE_DMA_RING_CLKEN);
1371 iowrite32(0x0, pdma->csr_ring + XGENE_DMA_RING_SRST);
1374 iowrite32(0x0, pdma->csr_ring + XGENE_DMA_RING_MEM_RAM_SHUTDOWN);
1377 ioread32(pdma->csr_ring + XGENE_DMA_RING_MEM_RAM_SHUTDOWN);
1382 if (ioread32(pdma->csr_ring + XGENE_DMA_RING_BLK_MEM_RDY)
1391 pdma->csr_ring + XGENE_DMA_RING_THRESLD0_SET1);
1393 pdma->csr_ring + XGENE_DMA_RING_THRESLD1_SET1);
1395 pdma->csr_ring + XGENE_DMA_RING_HYSTERESIS);
1399 pdma->csr_ring + XGENE_DMA_RING_CONFIG);
1644 pdma->csr_ring = devm_ioremap(&pdev->dev, res->start,
1646 if (!pdma->csr_ring) {