Lines Matching refs:chan
194 #define chan_dbg(chan, fmt, arg...) \
195 dev_dbg(chan->dev, "%s: " fmt, chan->name, ##arg)
196 #define chan_err(chan, fmt, arg...) \
197 dev_err(chan->dev, "%s: " fmt, chan->name, ##arg)
300 * @chan: reference to X-Gene DMA channels
312 struct xgene_dma_chan chan[XGENE_DMA_MAX_CHANNEL];
414 static void xgene_dma_prep_xor_desc(struct xgene_dma_chan *chan,
428 xgene_dma_init_desc(desc1, chan->tx_ring.dst_ring_num);
460 struct xgene_dma_chan *chan;
466 chan = to_dma_chan(tx->chan);
469 spin_lock_bh(&chan->lock);
474 list_splice_tail_init(&desc->tx_list, &chan->ld_pending);
476 spin_unlock_bh(&chan->lock);
481 static void xgene_dma_clean_descriptor(struct xgene_dma_chan *chan,
485 chan_dbg(chan, "LD %p free\n", desc);
486 dma_pool_free(chan->desc_pool, desc, desc->tx.phys);
490 struct xgene_dma_chan *chan)
495 desc = dma_pool_zalloc(chan->desc_pool, GFP_NOWAIT, &phys);
497 chan_err(chan, "Failed to allocate LDs\n");
504 dma_async_tx_descriptor_init(&desc->tx, &chan->dma_chan);
506 chan_dbg(chan, "LD %p allocated\n", desc);
514 * @chan: X-Gene DMA channel
518 static void xgene_dma_clean_completed_descriptor(struct xgene_dma_chan *chan)
523 list_for_each_entry_safe(desc, _desc, &chan->ld_completed, node) {
525 xgene_dma_clean_descriptor(chan, desc);
531 * @chan: X-Gene DMA channel
537 static void xgene_dma_run_tx_complete_actions(struct xgene_dma_chan *chan,
565 * @chan: X-Gene DMA channel
571 static void xgene_dma_clean_running_descriptor(struct xgene_dma_chan *chan,
586 list_add_tail(&desc->node, &chan->ld_completed);
590 chan_dbg(chan, "LD %p free\n", desc);
591 dma_pool_free(chan->desc_pool, desc, desc->tx.phys);
594 static void xgene_chan_xfer_request(struct xgene_dma_chan *chan,
597 struct xgene_dma_ring *ring = &chan->tx_ring;
627 chan->pending += ((desc_sw->flags &
637 * @chan : X-Gene DMA channel
639 * LOCKING: must hold chan->lock
641 static void xgene_chan_xfer_ld_pending(struct xgene_dma_chan *chan)
649 if (list_empty(&chan->ld_pending)) {
650 chan_dbg(chan, "No pending LDs\n");
658 list_for_each_entry_safe(desc_sw, _desc_sw, &chan->ld_pending, node) {
665 if (chan->pending >= chan->max_outstanding)
668 xgene_chan_xfer_request(chan, desc_sw);
674 list_move_tail(&desc_sw->node, &chan->ld_running);
681 * @chan: X-Gene DMA channel
687 static void xgene_dma_cleanup_descriptors(struct xgene_dma_chan *chan)
689 struct xgene_dma_ring *ring = &chan->rx_ring;
697 spin_lock(&chan->lock);
700 xgene_dma_clean_completed_descriptor(chan);
703 list_for_each_entry_safe(desc_sw, _desc_sw, &chan->ld_running, node) {
723 chan_err(chan, "%s\n", xgene_dma_desc_err[status]);
749 chan->pending -= ((desc_sw->flags &
764 xgene_chan_xfer_ld_pending(chan);
766 spin_unlock(&chan->lock);
770 xgene_dma_run_tx_complete_actions(chan, desc_sw);
771 xgene_dma_clean_running_descriptor(chan, desc_sw);
777 struct xgene_dma_chan *chan = to_dma_chan(dchan);
780 if (chan->desc_pool)
783 chan->desc_pool = dma_pool_create(chan->name, chan->dev,
786 if (!chan->desc_pool) {
787 chan_err(chan, "Failed to allocate descriptor pool\n");
791 chan_dbg(chan, "Allocate descriptor pool\n");
798 * @chan: X-Gene DMA channel
801 * LOCKING: must hold chan->lock
803 static void xgene_dma_free_desc_list(struct xgene_dma_chan *chan,
809 xgene_dma_clean_descriptor(chan, desc);
814 struct xgene_dma_chan *chan = to_dma_chan(dchan);
816 chan_dbg(chan, "Free all resources\n");
818 if (!chan->desc_pool)
822 xgene_dma_cleanup_descriptors(chan);
824 spin_lock_bh(&chan->lock);
827 xgene_dma_free_desc_list(chan, &chan->ld_pending);
828 xgene_dma_free_desc_list(chan, &chan->ld_running);
829 xgene_dma_free_desc_list(chan, &chan->ld_completed);
831 spin_unlock_bh(&chan->lock);
834 dma_pool_destroy(chan->desc_pool);
835 chan->desc_pool = NULL;
843 struct xgene_dma_chan *chan;
850 chan = to_dma_chan(dchan);
854 new = xgene_dma_alloc_descriptor(chan);
859 xgene_dma_prep_xor_desc(chan, new, &dst, src,
882 xgene_dma_free_desc_list(chan, &first->tx_list);
891 struct xgene_dma_chan *chan;
899 chan = to_dma_chan(dchan);
916 new = xgene_dma_alloc_descriptor(chan);
934 xgene_dma_prep_xor_desc(chan, new, &dst[0], src,
944 xgene_dma_prep_xor_desc(chan, new, &dst[1], _src,
959 xgene_dma_free_desc_list(chan, &first->tx_list);
965 struct xgene_dma_chan *chan = to_dma_chan(dchan);
967 spin_lock_bh(&chan->lock);
968 xgene_chan_xfer_ld_pending(chan);
969 spin_unlock_bh(&chan->lock);
981 struct xgene_dma_chan *chan = from_tasklet(chan, t, tasklet);
984 xgene_dma_cleanup_descriptors(chan);
987 enable_irq(chan->rx_irq);
992 struct xgene_dma_chan *chan = (struct xgene_dma_chan *)id;
994 BUG_ON(!chan);
1000 disable_irq_nosync(chan->rx_irq);
1007 tasklet_schedule(&chan->tasklet);
1136 static int xgene_dma_get_ring_size(struct xgene_dma_chan *chan,
1158 chan_err(chan, "Unsupported cfg ring size %d\n", cfgsize);
1178 static void xgene_dma_delete_chan_rings(struct xgene_dma_chan *chan)
1180 xgene_dma_delete_ring_one(&chan->rx_ring);
1181 xgene_dma_delete_ring_one(&chan->tx_ring);
1184 static int xgene_dma_create_ring_one(struct xgene_dma_chan *chan,
1191 ring->pdma = chan->pdma;
1193 ring->num = chan->pdma->ring_num++;
1196 ret = xgene_dma_get_ring_size(chan, cfgsize);
1202 ring->desc_vaddr = dma_alloc_coherent(chan->dev, ring->size,
1205 chan_err(chan, "Failed to allocate ring desc\n");
1216 static int xgene_dma_create_chan_rings(struct xgene_dma_chan *chan)
1218 struct xgene_dma_ring *rx_ring = &chan->rx_ring;
1219 struct xgene_dma_ring *tx_ring = &chan->tx_ring;
1224 rx_ring->buf_num = XGENE_DMA_CPU_BUFNUM + chan->id;
1226 ret = xgene_dma_create_ring_one(chan, rx_ring,
1231 chan_dbg(chan, "Rx ring id 0x%X num %d desc 0x%p\n",
1236 tx_ring->buf_num = XGENE_DMA_BUFNUM + chan->id;
1238 ret = xgene_dma_create_ring_one(chan, tx_ring,
1247 chan_dbg(chan,
1252 chan->max_outstanding = tx_ring->slots;
1262 ret = xgene_dma_create_chan_rings(&pdma->chan[i]);
1265 xgene_dma_delete_chan_rings(&pdma->chan[j]);
1433 struct xgene_dma_chan *chan;
1447 chan = &pdma->chan[i];
1448 irq_set_status_flags(chan->rx_irq, IRQ_DISABLE_UNLAZY);
1449 ret = devm_request_irq(chan->dev, chan->rx_irq,
1451 0, chan->name, chan);
1453 chan_err(chan, "Failed to register Rx IRQ %d\n",
1454 chan->rx_irq);
1458 chan = &pdma->chan[i];
1459 irq_clear_status_flags(chan->rx_irq, IRQ_DISABLE_UNLAZY);
1460 devm_free_irq(chan->dev, chan->rx_irq, chan);
1472 struct xgene_dma_chan *chan;
1479 chan = &pdma->chan[i];
1480 irq_clear_status_flags(chan->rx_irq, IRQ_DISABLE_UNLAZY);
1481 devm_free_irq(chan->dev, chan->rx_irq, chan);
1485 static void xgene_dma_set_caps(struct xgene_dma_chan *chan,
1502 if ((chan->id == XGENE_DMA_PQ_CHANNEL) &&
1503 is_pq_enabled(chan->pdma)) {
1506 } else if ((chan->id == XGENE_DMA_XOR_CHANNEL) &&
1507 !is_pq_enabled(chan->pdma)) {
1512 dma_dev->dev = chan->dev;
1533 struct xgene_dma_chan *chan = &pdma->chan[id];
1537 chan->dma_chan.device = dma_dev;
1539 spin_lock_init(&chan->lock);
1540 INIT_LIST_HEAD(&chan->ld_pending);
1541 INIT_LIST_HEAD(&chan->ld_running);
1542 INIT_LIST_HEAD(&chan->ld_completed);
1543 tasklet_setup(&chan->tasklet, xgene_dma_tasklet_cb);
1545 chan->pending = 0;
1546 chan->desc_pool = NULL;
1547 dma_cookie_init(&chan->dma_chan);
1550 xgene_dma_set_caps(chan, dma_dev);
1554 list_add_tail(&chan->dma_chan.device_node, &dma_dev->channels);
1559 chan_err(chan, "Failed to register async device %d", ret);
1560 tasklet_kill(&chan->tasklet);
1567 "%s: CAPABILITY ( %s%s)\n", dma_chan_name(&chan->dma_chan),
1583 tasklet_kill(&pdma->chan[j].tasklet);
1603 struct xgene_dma_chan *chan;
1609 chan = &pdma->chan[i];
1610 chan->dev = pdma->dev;
1611 chan->pdma = pdma;
1612 chan->id = i;
1613 snprintf(chan->name, sizeof(chan->name), "dmachan%d", chan->id);
1694 pdma->chan[i - 1].rx_irq = irq;
1769 xgene_dma_delete_chan_rings(&pdma->chan[i]);
1782 struct xgene_dma_chan *chan;
1793 chan = &pdma->chan[i];
1794 tasklet_kill(&chan->tasklet);
1795 xgene_dma_delete_chan_rings(chan);