Lines Matching refs:hwdesc
234 struct udma_hwdesc hwdesc[];
496 return d->hwdesc[idx].cppi5_desc_paddr;
501 return d->hwdesc[idx].cppi5_desc_vaddr;
537 if (!d->hwdesc[i].cppi5_desc_vaddr)
541 d->hwdesc[i].cppi5_desc_vaddr,
542 d->hwdesc[i].cppi5_desc_paddr);
544 d->hwdesc[i].cppi5_desc_vaddr = NULL;
546 } else if (d->hwdesc[0].cppi5_desc_vaddr) {
547 dma_free_coherent(uc->dma_dev, d->hwdesc[0].cppi5_desc_size,
548 d->hwdesc[0].cppi5_desc_vaddr,
549 d->hwdesc[0].cppi5_desc_paddr);
551 d->hwdesc[0].cppi5_desc_vaddr = NULL;
1046 h_desc = d->hwdesc[d->desc_idx].cppi5_desc_vaddr;
1054 struct cppi5_host_desc_t *h_desc = d->hwdesc[0].cppi5_desc_vaddr;
2758 struct udma_hwdesc *hwdesc;
2776 d = kzalloc(sizeof(*d) + sizeof(d->hwdesc[0]), GFP_NOWAIT);
2783 hwdesc = &d->hwdesc[0];
2787 hwdesc->cppi5_desc_size = uc->config.hdesc_size;
2788 hwdesc->cppi5_desc_vaddr = dma_pool_zalloc(uc->hdesc_pool,
2790 &hwdesc->cppi5_desc_paddr);
2792 hwdesc->cppi5_desc_size = cppi5_trdesc_calc_size(tr_size,
2794 hwdesc->cppi5_desc_size = ALIGN(hwdesc->cppi5_desc_size,
2796 hwdesc->cppi5_desc_vaddr = dma_alloc_coherent(uc->ud->dev,
2797 hwdesc->cppi5_desc_size,
2798 &hwdesc->cppi5_desc_paddr,
2802 if (!hwdesc->cppi5_desc_vaddr) {
2808 hwdesc->tr_req_base = hwdesc->cppi5_desc_vaddr + tr_size;
2810 hwdesc->tr_resp_base = hwdesc->tr_req_base + tr_size * tr_count;
2812 tr_desc = hwdesc->cppi5_desc_vaddr;
2911 tr_req = d->hwdesc[0].tr_req_base;
3045 tr_req = d->hwdesc[0].tr_req_base;
3224 d = kzalloc(struct_size(d, hwdesc, sglen), GFP_NOWAIT);
3242 struct udma_hwdesc *hwdesc = &d->hwdesc[i];
3247 hwdesc->cppi5_desc_vaddr = dma_pool_zalloc(uc->hdesc_pool,
3249 &hwdesc->cppi5_desc_paddr);
3250 if (!hwdesc->cppi5_desc_vaddr) {
3260 hwdesc->cppi5_desc_size = uc->config.hdesc_size;
3261 desc = hwdesc->cppi5_desc_vaddr;
3281 hwdesc->cppi5_desc_paddr | asel);
3297 h_desc = d->hwdesc[0].cppi5_desc_vaddr;
3321 h_desc = d->hwdesc[0].cppi5_desc_vaddr;
3349 h_desc = d->hwdesc[0].cppi5_desc_vaddr;
3378 h_desc = d->hwdesc[0].cppi5_desc_vaddr;
3494 tr_req = d->hwdesc[0].tr_req_base;
3553 d = kzalloc(struct_size(d, hwdesc, periods), GFP_NOWAIT);
3569 struct udma_hwdesc *hwdesc = &d->hwdesc[i];
3573 hwdesc->cppi5_desc_vaddr = dma_pool_zalloc(uc->hdesc_pool,
3575 &hwdesc->cppi5_desc_paddr);
3576 if (!hwdesc->cppi5_desc_vaddr) {
3585 hwdesc->cppi5_desc_size = uc->config.hdesc_size;
3586 h_desc = hwdesc->cppi5_desc_vaddr;
3717 tr_req = d->hwdesc[0].tr_req_base;
3996 status = d->hwdesc[0].tr_resp_base->status;
5117 struct udma_hwdesc *hwdesc;
5134 hwdesc = &rx_flush->hwdescs[0];
5136 hwdesc->cppi5_desc_size = cppi5_trdesc_calc_size(tr_size, 1);
5137 hwdesc->cppi5_desc_size = ALIGN(hwdesc->cppi5_desc_size,
5140 hwdesc->cppi5_desc_vaddr = devm_kzalloc(dev, hwdesc->cppi5_desc_size,
5142 if (!hwdesc->cppi5_desc_vaddr)
5145 hwdesc->cppi5_desc_paddr = dma_map_single(dev, hwdesc->cppi5_desc_vaddr,
5146 hwdesc->cppi5_desc_size,
5148 if (dma_mapping_error(dev, hwdesc->cppi5_desc_paddr))
5152 hwdesc->tr_req_base = hwdesc->cppi5_desc_vaddr + tr_size;
5154 hwdesc->tr_resp_base = hwdesc->tr_req_base + tr_size;
5156 tr_desc = hwdesc->cppi5_desc_vaddr;
5161 tr_req = hwdesc->tr_req_base;
5170 dma_sync_single_for_device(dev, hwdesc->cppi5_desc_paddr,
5171 hwdesc->cppi5_desc_size, DMA_TO_DEVICE);
5174 hwdesc = &rx_flush->hwdescs[1];
5175 hwdesc->cppi5_desc_size = ALIGN(sizeof(struct cppi5_host_desc_t) +
5180 hwdesc->cppi5_desc_vaddr = devm_kzalloc(dev, hwdesc->cppi5_desc_size,
5182 if (!hwdesc->cppi5_desc_vaddr)
5185 hwdesc->cppi5_desc_paddr = dma_map_single(dev, hwdesc->cppi5_desc_vaddr,
5186 hwdesc->cppi5_desc_size,
5188 if (dma_mapping_error(dev, hwdesc->cppi5_desc_paddr))
5191 desc = hwdesc->cppi5_desc_vaddr;
5200 dma_sync_single_for_device(dev, hwdesc->cppi5_desc_paddr,
5201 hwdesc->cppi5_desc_size, DMA_TO_DEVICE);