Lines Matching defs:tdma
131 struct tegra_adma *tdma;
168 static inline void tdma_write(struct tegra_adma *tdma, u32 reg, u32 val)
170 writel(val, tdma->base_addr + tdma->cdata->global_reg_offset + reg);
173 static inline u32 tdma_read(struct tegra_adma *tdma, u32 reg)
175 return readl(tdma->base_addr + tdma->cdata->global_reg_offset + reg);
201 return tdc->tdma->dev;
219 static int tegra_adma_init(struct tegra_adma *tdma)
225 tdma_write(tdma, tdma->cdata->ch_base_offset + tdma->cdata->global_int_clear, 0x1);
228 tdma_write(tdma, ADMA_GLOBAL_SOFT_RESET, 0x1);
232 tdma->base_addr +
233 tdma->cdata->global_reg_offset +
240 tdma_write(tdma, ADMA_GLOBAL_CMD, 1);
248 struct tegra_adma *tdma = tdc->tdma;
254 if (sreq_index > tdma->cdata->ch_req_max) {
255 dev_err(tdma->dev, "invalid DMA request\n");
261 if (test_and_set_bit(sreq_index, &tdma->tx_requests_reserved)) {
262 dev_err(tdma->dev, "DMA request reserved\n");
268 if (test_and_set_bit(sreq_index, &tdma->rx_requests_reserved)) {
269 dev_err(tdma->dev, "DMA request reserved\n");
275 dev_WARN(tdma->dev, "channel %s has invalid transfer type\n",
288 struct tegra_adma *tdma = tdc->tdma;
295 clear_bit(tdc->sreq_index, &tdma->tx_requests_reserved);
299 clear_bit(tdc->sreq_index, &tdma->rx_requests_reserved);
303 dev_WARN(tdma->dev, "channel %s has invalid transfer type\n",
560 const struct tegra_adma_chip_data *cdata = tdc->tdma->cdata;
706 struct tegra_adma *tdma = ofdma->of_dma_data;
717 dev_err(tdma->dev, "DMA request must not be 0\n");
721 chan = dma_get_any_slave_channel(&tdma->dma_dev);
733 struct tegra_adma *tdma = dev_get_drvdata(dev);
738 tdma->global_cmd = tdma_read(tdma, ADMA_GLOBAL_CMD);
739 if (!tdma->global_cmd)
742 for (i = 0; i < tdma->nr_channels; i++) {
743 tdc = &tdma->channels[i];
758 clk_disable_unprepare(tdma->ahub_clk);
765 struct tegra_adma *tdma = dev_get_drvdata(dev);
770 ret = clk_prepare_enable(tdma->ahub_clk);
775 tdma_write(tdma, ADMA_GLOBAL_CMD, tdma->global_cmd);
777 if (!tdma->global_cmd)
780 for (i = 0; i < tdma->nr_channels; i++) {
781 tdc = &tdma->channels[i];
840 struct tegra_adma *tdma;
849 tdma = devm_kzalloc(&pdev->dev,
850 struct_size(tdma, channels, cdata->nr_channels),
852 if (!tdma)
855 tdma->dev = &pdev->dev;
856 tdma->cdata = cdata;
857 tdma->nr_channels = cdata->nr_channels;
858 platform_set_drvdata(pdev, tdma);
860 tdma->base_addr = devm_platform_ioremap_resource(pdev, 0);
861 if (IS_ERR(tdma->base_addr))
862 return PTR_ERR(tdma->base_addr);
864 tdma->ahub_clk = devm_clk_get(&pdev->dev, "d_audio");
865 if (IS_ERR(tdma->ahub_clk)) {
867 return PTR_ERR(tdma->ahub_clk);
870 INIT_LIST_HEAD(&tdma->dma_dev.channels);
871 for (i = 0; i < tdma->nr_channels; i++) {
872 struct tegra_adma_chan *tdc = &tdma->channels[i];
874 tdc->chan_addr = tdma->base_addr + cdata->ch_base_offset
883 vchan_init(&tdc->vc, &tdma->dma_dev);
885 tdc->tdma = tdma;
894 ret = tegra_adma_init(tdma);
898 dma_cap_set(DMA_SLAVE, tdma->dma_dev.cap_mask);
899 dma_cap_set(DMA_PRIVATE, tdma->dma_dev.cap_mask);
900 dma_cap_set(DMA_CYCLIC, tdma->dma_dev.cap_mask);
902 tdma->dma_dev.dev = &pdev->dev;
903 tdma->dma_dev.device_alloc_chan_resources =
905 tdma->dma_dev.device_free_chan_resources =
907 tdma->dma_dev.device_issue_pending = tegra_adma_issue_pending;
908 tdma->dma_dev.device_prep_dma_cyclic = tegra_adma_prep_dma_cyclic;
909 tdma->dma_dev.device_config = tegra_adma_slave_config;
910 tdma->dma_dev.device_tx_status = tegra_adma_tx_status;
911 tdma->dma_dev.device_terminate_all = tegra_adma_terminate_all;
912 tdma->dma_dev.src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
913 tdma->dma_dev.dst_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
914 tdma->dma_dev.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV);
915 tdma->dma_dev.residue_granularity = DMA_RESIDUE_GRANULARITY_SEGMENT;
916 tdma->dma_dev.device_pause = tegra_adma_pause;
917 tdma->dma_dev.device_resume = tegra_adma_resume;
919 ret = dma_async_device_register(&tdma->dma_dev);
926 tegra_dma_of_xlate, tdma);
935 tdma->nr_channels);
940 dma_async_device_unregister(&tdma->dma_dev);
947 irq_dispose_mapping(tdma->channels[i].irq);
954 struct tegra_adma *tdma = platform_get_drvdata(pdev);
958 dma_async_device_unregister(&tdma->dma_dev);
960 for (i = 0; i < tdma->nr_channels; ++i)
961 irq_dispose_mapping(tdma->channels[i].irq);