Lines Matching refs:status
129 /* DMA byte count status */
158 * on-flight burst and update DMA status register.
213 * manage client request and keep track of transfer status, callbacks
441 /* Return 0 irrespective of PAUSE status.
452 u32 csr, status;
463 /* Clear interrupt status if it is there */
464 status = tdc_read(tdc, TEGRA_GPCDMA_CHAN_STATUS);
465 if (status & TEGRA_GPCDMA_STATUS_ISE_EOC) {
467 tdc_write(tdc, TEGRA_GPCDMA_CHAN_STATUS, status);
595 u32 status;
597 /* Check channel error status register */
598 status = tdc_read(tdc, TEGRA_GPCDMA_CHAN_ERR_STATUS);
599 if (status) {
600 tegra_dma_chan_decode_error(tdc, status);
606 status = tdc_read(tdc, TEGRA_GPCDMA_CHAN_STATUS);
607 if (!(status & TEGRA_GPCDMA_STATUS_ISE_EOC))
663 u32 status, csr;
685 status,
686 !(status & (TEGRA_GPCDMA_STATUS_CHANNEL_TX |
733 u32 wcount = 0, status;
742 status = tdc_read(tdc, TEGRA_GPCDMA_CHAN_STATUS);
743 if (status & TEGRA_GPCDMA_STATUS_ISE_EOC)