Lines Matching defs:dma_dev
255 struct dma_device dma_dev;
1285 chan = dma_get_any_slave_channel(&tdma->dma_dev);
1379 tdma->dma_dev.dev = &pdev->dev;
1397 INIT_LIST_HEAD(&tdma->dma_dev.channels);
1416 vchan_init(&tdc->vc, &tdma->dma_dev);
1424 dma_cap_set(DMA_SLAVE, tdma->dma_dev.cap_mask);
1425 dma_cap_set(DMA_PRIVATE, tdma->dma_dev.cap_mask);
1426 dma_cap_set(DMA_MEMCPY, tdma->dma_dev.cap_mask);
1427 dma_cap_set(DMA_MEMSET, tdma->dma_dev.cap_mask);
1428 dma_cap_set(DMA_CYCLIC, tdma->dma_dev.cap_mask);
1434 tdma->dma_dev.copy_align = 2;
1435 tdma->dma_dev.fill_align = 2;
1436 tdma->dma_dev.device_alloc_chan_resources =
1438 tdma->dma_dev.device_free_chan_resources =
1440 tdma->dma_dev.device_prep_slave_sg = tegra_dma_prep_slave_sg;
1441 tdma->dma_dev.device_prep_dma_memcpy = tegra_dma_prep_dma_memcpy;
1442 tdma->dma_dev.device_prep_dma_memset = tegra_dma_prep_dma_memset;
1443 tdma->dma_dev.device_prep_dma_cyclic = tegra_dma_prep_dma_cyclic;
1444 tdma->dma_dev.device_config = tegra_dma_slave_config;
1445 tdma->dma_dev.device_terminate_all = tegra_dma_terminate_all;
1446 tdma->dma_dev.device_tx_status = tegra_dma_tx_status;
1447 tdma->dma_dev.device_issue_pending = tegra_dma_issue_pending;
1448 tdma->dma_dev.device_pause = tegra_dma_device_pause;
1449 tdma->dma_dev.device_resume = tegra_dma_device_resume;
1450 tdma->dma_dev.device_synchronize = tegra_dma_chan_synchronize;
1451 tdma->dma_dev.residue_granularity = DMA_RESIDUE_GRANULARITY_BURST;
1453 ret = dma_async_device_register(&tdma->dma_dev);
1466 dma_async_device_unregister(&tdma->dma_dev);
1481 dma_async_device_unregister(&tdma->dma_dev);