Lines Matching defs:DMA_IRQ_EN
29 #define DMA_IRQ_EN(x) ((x) * 0x04)
42 /* Offset between DMA_IRQ_EN and DMA_IRQ_STAT limits number of channels */
244 DMA_IRQ_EN(0), readl(sdev->base + DMA_IRQ_EN(0)),
245 DMA_IRQ_EN(1), readl(sdev->base + DMA_IRQ_EN(1)),
462 irq_val = readl(sdev->base + DMA_IRQ_EN(irq_reg));
466 writel(irq_val, sdev->base + DMA_IRQ_EN(irq_reg));
1054 writel(0, sdev->base + DMA_IRQ_EN(0));
1055 writel(0, sdev->base + DMA_IRQ_EN(1));