Lines Matching refs:status
37 /* MDMA Channel x interrupt/status register */
59 /* MDMA Channel x error status register */
437 u32 status;
445 /* Clear interrupt status if it is there */
446 status = stm32_mdma_read(dmadev, STM32_MDMA_CISR(chan->id));
447 if (status) {
449 __func__, status);
450 stm32_mdma_set_bits(dmadev, STM32_MDMA_CIFCR(chan->id), status);
1148 u32 status, reg;
1173 /* Clear interrupt status if it is there */
1174 status = stm32_mdma_read(dmadev, STM32_MDMA_CISR(id));
1175 if (status)
1176 stm32_mdma_set_bits(dmadev, STM32_MDMA_CIFCR(id), status);
1235 u32 status, reg;
1248 /* Clear interrupt status if it is there */
1249 status = stm32_mdma_read(dmadev, STM32_MDMA_CISR(chan->id));
1250 if (status)
1251 stm32_mdma_set_bits(dmadev, STM32_MDMA_CIFCR(chan->id), status);
1367 enum dma_status status;
1371 status = dma_cookie_status(c, cookie, state);
1372 if ((status == DMA_COMPLETE) || (!state))
1373 return status;
1387 return status;
1404 u32 reg, id, ccr, ien, status;
1407 status = readl_relaxed(dmadev->base + STM32_MDMA_GISR0);
1408 if (!status) {
1412 id = __ffs(status);
1417 status = stm32_mdma_read(dmadev, STM32_MDMA_CISR(id));
1419 status &= ~STM32_MDMA_CISR_CRQA;
1423 if (!(status & ien)) {
1427 "spurious it (status=0x%04x, ien=0x%04x)\n", status, ien);
1430 "spurious it (status=0x%04x, ien=0x%04x)\n", status, ien);
1436 if (status & STM32_MDMA_CISR_TEIF) {
1440 status &= ~STM32_MDMA_CISR_TEIF;
1443 if (status & STM32_MDMA_CISR_CTCIF) {
1445 status &= ~STM32_MDMA_CISR_CTCIF;
1449 if (status & STM32_MDMA_CISR_BRTIF) {
1451 status &= ~STM32_MDMA_CISR_BRTIF;
1454 if (status & STM32_MDMA_CISR_BTIF) {
1456 status &= ~STM32_MDMA_CISR_BTIF;
1465 if (status & STM32_MDMA_CISR_TCIF) {
1467 status &= ~STM32_MDMA_CISR_TCIF;
1470 if (status) {
1471 stm32_mdma_set_bits(dmadev, reg, status);
1472 dev_err(chan2dev(chan), "DMA error: status=0x%08x\n", status);