Lines Matching defs:hwdesc
218 struct stm32_mdma_hwdesc *hwdesc;
326 desc->node[i].hwdesc =
329 if (!desc->node[i].hwdesc)
340 dma_pool_free(chan->desc_pool, desc->node[i].hwdesc,
353 dma_pool_free(chan->desc_pool, desc->node[i].hwdesc,
676 dev_dbg(chan2dev(chan), "hwdesc: %pad\n", &node->hwdesc_phys);
677 dev_dbg(chan2dev(chan), "CTCR: 0x%08x\n", node->hwdesc->ctcr);
678 dev_dbg(chan2dev(chan), "CBNDTR: 0x%08x\n", node->hwdesc->cbndtr);
679 dev_dbg(chan2dev(chan), "CSAR: 0x%08x\n", node->hwdesc->csar);
680 dev_dbg(chan2dev(chan), "CDAR: 0x%08x\n", node->hwdesc->cdar);
681 dev_dbg(chan2dev(chan), "CBRUR: 0x%08x\n", node->hwdesc->cbrur);
682 dev_dbg(chan2dev(chan), "CLAR: 0x%08x\n", node->hwdesc->clar);
683 dev_dbg(chan2dev(chan), "CTBR: 0x%08x\n", node->hwdesc->ctbr);
684 dev_dbg(chan2dev(chan), "CMAR: 0x%08x\n", node->hwdesc->cmar);
685 dev_dbg(chan2dev(chan), "CMDR: 0x%08x\n\n", node->hwdesc->cmdr);
696 struct stm32_mdma_hwdesc *hwdesc;
699 hwdesc = desc->node[count].hwdesc;
700 hwdesc->ctcr = ctcr;
701 hwdesc->cbndtr &= ~(STM32_MDMA_CBNDTR_BRC_MK |
705 hwdesc->cbndtr |= STM32_MDMA_CBNDTR_BNDT(len);
706 hwdesc->csar = src_addr;
707 hwdesc->cdar = dst_addr;
708 hwdesc->cbrur = 0;
709 hwdesc->ctbr = ctbr;
710 hwdesc->cmar = config->mask_addr;
711 hwdesc->cmdr = config->mask_data;
715 hwdesc->clar = desc->node[0].hwdesc_phys;
717 hwdesc->clar = 0;
719 hwdesc->clar = desc->node[next].hwdesc_phys;
820 struct stm32_mdma_hwdesc *hwdesc;
823 hwdesc = desc->node[i].hwdesc;
824 hwdesc->cmar = 0;
825 hwdesc->cmdr = 0;
835 dma_pool_free(chan->desc_pool, desc->node[i].hwdesc,
906 /* Configure hwdesc list */
931 dma_pool_free(chan->desc_pool, desc->node[i].hwdesc,
945 struct stm32_mdma_hwdesc *hwdesc;
1046 hwdesc = desc->node[0].hwdesc;
1047 hwdesc->ctcr = ctcr;
1048 hwdesc->cbndtr = cbndtr;
1049 hwdesc->csar = src;
1050 hwdesc->cdar = dest;
1051 hwdesc->cbrur = 0;
1052 hwdesc->clar = 0;
1053 hwdesc->ctbr = ctbr;
1054 hwdesc->cmar = 0;
1055 hwdesc->cmdr = 0;
1146 struct stm32_mdma_hwdesc *hwdesc;
1159 hwdesc = chan->desc->node[0].hwdesc;
1163 stm32_mdma_write(dmadev, STM32_MDMA_CTCR(id), hwdesc->ctcr);
1164 stm32_mdma_write(dmadev, STM32_MDMA_CBNDTR(id), hwdesc->cbndtr);
1165 stm32_mdma_write(dmadev, STM32_MDMA_CSAR(id), hwdesc->csar);
1166 stm32_mdma_write(dmadev, STM32_MDMA_CDAR(id), hwdesc->cdar);
1167 stm32_mdma_write(dmadev, STM32_MDMA_CBRUR(id), hwdesc->cbrur);
1168 stm32_mdma_write(dmadev, STM32_MDMA_CLAR(id), hwdesc->clar);
1169 stm32_mdma_write(dmadev, STM32_MDMA_CTBR(id), hwdesc->ctbr);
1170 stm32_mdma_write(dmadev, STM32_MDMA_CMAR(id), hwdesc->cmar);
1171 stm32_mdma_write(dmadev, STM32_MDMA_CMDR(id), hwdesc->cmdr);
1184 if (hwdesc->ctcr & STM32_MDMA_CTCR_SWRM) {
1233 struct stm32_mdma_hwdesc *hwdesc;
1241 hwdesc = chan->desc->node[chan->curr_hwdesc].hwdesc;
1260 if (hwdesc->ctcr & STM32_MDMA_CTCR_SWRM)
1325 struct stm32_mdma_hwdesc *hwdesc;
1335 hwdesc = desc->node[i].hwdesc;
1337 if (hwdesc->clar == clar)
1341 residue += STM32_MDMA_CBNDTR_BNDT(hwdesc->cbndtr);