Lines Matching defs:ctbr
211 u32 ctbr;
456 static void stm32_mdma_set_bus(struct stm32_mdma_device *dmadev, u32 *ctbr,
463 *ctbr &= ~ctbr_mask;
467 *ctbr |= ctbr_mask;
485 u32 ccr, ctcr, ctbr, tlen;
494 ctbr = stm32_mdma_read(dmadev, STM32_MDMA_CTBR(chan->id));
540 ctbr &= ~STM32_MDMA_CTBR_TSEL_MASK;
541 ctbr |= STM32_MDMA_CTBR_TSEL(chan_config->request);
593 stm32_mdma_set_bus(dmadev, &ctbr, STM32_MDMA_CTBR_DBUS,
651 stm32_mdma_set_bus(dmadev, &ctbr, STM32_MDMA_CTBR_SBUS,
668 *mdma_ctbr = ctbr;
683 dev_dbg(chan2dev(chan), "CTBR: 0x%08x\n", node->hwdesc->ctbr);
692 u32 len, u32 ctcr, u32 ctbr, bool is_last,
709 hwdesc->ctbr = ctbr;
735 u32 m2m_hw_period, ccr, ctcr, ctbr;
753 &ctcr, &ctbr, src_addr,
755 stm32_mdma_set_bus(dmadev, &ctbr, STM32_MDMA_CTBR_SBUS,
763 &ctcr, &ctbr, dst_addr,
765 stm32_mdma_set_bus(dmadev, &ctbr, STM32_MDMA_CTBR_DBUS,
773 dst_addr, sg_dma_len(sg), ctcr, ctbr,
853 u32 ccr, ctcr, ctbr, count;
887 &ctbr, src_addr, period_len);
888 stm32_mdma_set_bus(dmadev, &ctbr, STM32_MDMA_CTBR_SBUS,
893 &ctbr, dst_addr, period_len);
894 stm32_mdma_set_bus(dmadev, &ctbr, STM32_MDMA_CTBR_DBUS,
921 dst_addr, period_len, ctcr, ctbr,
946 u32 ccr, ctcr, ctbr, cbndtr, count, max_burst, mdma_burst;
970 ctbr = stm32_mdma_read(dmadev, STM32_MDMA_CTBR(chan->id));
991 ctbr &= ~STM32_MDMA_CTBR_TSEL_MASK;
994 stm32_mdma_set_bus(dmadev, &ctbr, STM32_MDMA_CTBR_SBUS, src);
995 stm32_mdma_set_bus(dmadev, &ctbr, STM32_MDMA_CTBR_DBUS, dest);
1053 hwdesc->ctbr = ctbr;
1104 xfer_count, ctcr, ctbr,
1169 stm32_mdma_write(dmadev, STM32_MDMA_CTBR(id), hwdesc->ctbr);