Lines Matching refs:dma_sm1ar
181 u32 dma_sm1ar;
596 stm32_dma_write(dmadev, STM32_DMA_SM1AR(chan->id), reg->dma_sm1ar);
624 u32 dma_scr, dma_sm0ar, dma_sm1ar, id;
637 dma_sm1ar = sg_req->chan_reg.dma_sm1ar;
638 stm32_dma_write(dmadev, STM32_DMA_SM1AR(id), dma_sm1ar);
710 stm32_dma_write(dmadev, STM32_DMA_SM1AR(id), sg_req->chan_reg.dma_sm1ar);
880 sm1ar = sg_req->chan_reg.dma_sm1ar;
1141 desc->sg_req[i].chan_reg.dma_sm1ar = sg_dma_address(sg);
1143 desc->sg_req[i].chan_reg.dma_sm1ar += sg_dma_len(sg);
1230 desc->sg_req[i].chan_reg.dma_sm1ar = buf_addr;
1232 desc->sg_req[i].chan_reg.dma_sm1ar += period_len;
1355 return (dma_smar >= sg_req->chan_reg.dma_sm1ar &&
1356 dma_smar < sg_req->chan_reg.dma_sm1ar + period_len);