Lines Matching defs:sg_req
194 struct stm32_dma_sg_req sg_req[];
561 struct stm32_dma_sg_req *sg_req;
584 sg_req = &chan->desc->sg_req[chan->next_sg];
585 reg = &sg_req->chan_reg;
623 struct stm32_dma_sg_req *sg_req;
629 sg_req = &chan->desc->sg_req[chan->next_sg];
632 dma_sm0ar = sg_req->chan_reg.dma_sm0ar;
637 dma_sm1ar = sg_req->chan_reg.dma_sm1ar;
686 struct stm32_dma_sg_req *sg_req;
698 sg_req = &chan->desc->sg_req[chan->desc->num_sgs - 1];
700 sg_req = &chan->desc->sg_req[chan->next_sg - 1];
703 stm32_dma_write(dmadev, STM32_DMA_SNDTR(chan->id), sg_req->chan_reg.dma_sndtr);
706 stm32_dma_write(dmadev, STM32_DMA_SPAR(id), sg_req->chan_reg.dma_spar);
709 stm32_dma_write(dmadev, STM32_DMA_SM0AR(id), sg_req->chan_reg.dma_sm0ar);
710 stm32_dma_write(dmadev, STM32_DMA_SM1AR(id), sg_req->chan_reg.dma_sm1ar);
857 struct stm32_dma_sg_req *sg_req;
871 sg_req = &chan->desc->sg_req[chan->desc->num_sgs - 1];
873 sg_req = &chan->desc->sg_req[chan->next_sg - 1];
875 ndtr = sg_req->chan_reg.dma_sndtr;
878 spar = sg_req->chan_reg.dma_spar;
879 sm0ar = sg_req->chan_reg.dma_sm0ar;
880 sm1ar = sg_req->chan_reg.dma_sm1ar;
1105 desc = kzalloc(struct_size(desc, sg_req, sg_len), GFP_NOWAIT);
1128 desc->sg_req[i].len = sg_dma_len(sg);
1130 nb_data_items = desc->sg_req[i].len / buswidth;
1136 stm32_dma_clear_reg(&desc->sg_req[i].chan_reg);
1137 desc->sg_req[i].chan_reg.dma_scr = chan->chan_reg.dma_scr;
1138 desc->sg_req[i].chan_reg.dma_sfcr = chan->chan_reg.dma_sfcr;
1139 desc->sg_req[i].chan_reg.dma_spar = chan->chan_reg.dma_spar;
1140 desc->sg_req[i].chan_reg.dma_sm0ar = sg_dma_address(sg);
1141 desc->sg_req[i].chan_reg.dma_sm1ar = sg_dma_address(sg);
1143 desc->sg_req[i].chan_reg.dma_sm1ar += sg_dma_len(sg);
1144 desc->sg_req[i].chan_reg.dma_sndtr = nb_data_items;
1218 desc = kzalloc(struct_size(desc, sg_req, num_periods), GFP_NOWAIT);
1223 desc->sg_req[i].len = period_len;
1225 stm32_dma_clear_reg(&desc->sg_req[i].chan_reg);
1226 desc->sg_req[i].chan_reg.dma_scr = chan->chan_reg.dma_scr;
1227 desc->sg_req[i].chan_reg.dma_sfcr = chan->chan_reg.dma_sfcr;
1228 desc->sg_req[i].chan_reg.dma_spar = chan->chan_reg.dma_spar;
1229 desc->sg_req[i].chan_reg.dma_sm0ar = buf_addr;
1230 desc->sg_req[i].chan_reg.dma_sm1ar = buf_addr;
1232 desc->sg_req[i].chan_reg.dma_sm1ar += period_len;
1233 desc->sg_req[i].chan_reg.dma_sndtr = nb_data_items;
1256 desc = kzalloc(struct_size(desc, sg_req, num_sgs), GFP_NOWAIT);
1276 stm32_dma_clear_reg(&desc->sg_req[i].chan_reg);
1277 desc->sg_req[i].chan_reg.dma_scr =
1285 desc->sg_req[i].chan_reg.dma_sfcr |= STM32_DMA_SFCR_MASK;
1286 desc->sg_req[i].chan_reg.dma_sfcr |= FIELD_PREP(STM32_DMA_SFCR_FTH_MASK, threshold);
1287 desc->sg_req[i].chan_reg.dma_spar = src + offset;
1288 desc->sg_req[i].chan_reg.dma_sm0ar = dest + offset;
1289 desc->sg_req[i].chan_reg.dma_sndtr = xfer_count;
1290 desc->sg_req[i].len = xfer_count;
1312 * stm32_dma_is_current_sg - check that expected sg_req is currently transferred
1326 struct stm32_dma_sg_req *sg_req;
1336 sg_req = &chan->desc->sg_req[chan->next_sg];
1337 period_len = sg_req->len;
1346 return (dma_smar >= sg_req->chan_reg.dma_sm0ar &&
1347 dma_smar < sg_req->chan_reg.dma_sm0ar + period_len);
1355 return (dma_smar >= sg_req->chan_reg.dma_sm1ar &&
1356 dma_smar < sg_req->chan_reg.dma_sm1ar + period_len);
1366 struct stm32_dma_sg_req *sg_req = &chan->desc->sg_req[chan->next_sg];
1372 * - the sg_req currently transferred
1401 residue = sg_req->len;
1413 residue += desc->sg_req[i].len;