Lines Matching defs:dma_sfcr
182 u32 dma_sfcr;
386 chan->chan_reg.dma_sfcr &= ~STM32_DMA_SFCR_MASK;
394 chan->chan_reg.dma_sfcr |= STM32_DMA_SFCR_MASK;
472 u32 dma_scr, dma_sfcr, status;
479 dma_sfcr = stm32_dma_read(dmadev, STM32_DMA_SFCR(chan->id));
480 dma_sfcr &= ~STM32_DMA_SFCR_FEIE;
481 stm32_dma_write(dmadev, STM32_DMA_SFCR(chan->id), dma_sfcr);
595 stm32_dma_write(dmadev, STM32_DMA_SFCR(chan->id), reg->dma_sfcr);
996 chan->chan_reg.dma_sfcr &= ~STM32_DMA_SFCR_FTH_MASK;
998 chan->chan_reg.dma_sfcr |= FIELD_PREP(STM32_DMA_SFCR_FTH_MASK, fifoth);
1053 chan->chan_reg.dma_sfcr &= ~STM32_DMA_SFCR_FTH_MASK;
1055 chan->chan_reg.dma_sfcr |= FIELD_PREP(STM32_DMA_SFCR_FTH_MASK, fifoth);
1138 desc->sg_req[i].chan_reg.dma_sfcr = chan->chan_reg.dma_sfcr;
1227 desc->sg_req[i].chan_reg.dma_sfcr = chan->chan_reg.dma_sfcr;
1285 desc->sg_req[i].chan_reg.dma_sfcr |= STM32_DMA_SFCR_MASK;
1286 desc->sg_req[i].chan_reg.dma_sfcr |= FIELD_PREP(STM32_DMA_SFCR_FTH_MASK, threshold);