Lines Matching defs:dst
30 u32 l3 = 0; /* dst */
38 /* dst is mem? -> increase address pos */
48 /* dst is hw? -> master port 1 */
71 u32 dst = 0;
87 dst |= BIT(D40_SREG_CFG_MST_POS);
88 dst |= D40_TYPE_TO_EVENT(cfg->dev_type);
91 dst |= BIT(D40_SREG_CFG_PHY_TM_POS);
93 dst |= 3 << D40_SREG_CFG_PHY_TM_POS;
96 dst |= BIT(D40_SREG_CFG_TIM_POS);
100 dst |= BIT(D40_SREG_CFG_EIM_POS);
108 dst |= BIT(D40_SREG_CFG_PHY_PEN_POS);
109 dst |= cfg->dst_info.psize << D40_SREG_CFG_PSIZE_POS;
115 dst |= d40_width_to_bits(cfg->dst_info.data_width)
121 dst |= BIT(D40_SREG_CFG_PRI_POS);
127 dst |= BIT(D40_SREG_CFG_LBE_POS);
130 *dst_cfg = dst;
288 dma_addr_t dst = target ?: sg_addr;
298 lli = d40_phy_buf_to_lli(lli, dst, len, l_phys, lli_phys,
391 u32 lcsp13, /* src or dst*/
422 u32 lcsp13, /* src or dst*/