Lines Matching refs:dma_cfg
474 * @dma_cfg: The client configuration of this dma channel.
476 * @configured: whether the dma_cfg configuration is valid
501 struct stedma40_chan_cfg dma_cfg;
883 chan->dma_cfg.dir == DMA_DEV_TO_MEM))
1266 u32 event = D40_TYPE_TO_EVENT(d40c->dma_cfg.dev_type);
1269 if ((d40c->dma_cfg.dir == DMA_DEV_TO_MEM) ||
1270 (d40c->dma_cfg.dir == DMA_DEV_TO_DEV))
1274 if (d40c->dma_cfg.dir != DMA_DEV_TO_MEM)
1368 return phy_map[d40c->dma_cfg.mode_opt];
1370 return log_map[d40c->dma_cfg.mode_opt];
1422 return num_elt * d40c->dma_cfg.dst_info.data_width;
1858 int dev_type = d40c->dma_cfg.dev_type;
1867 bool is_log = d40c->dma_cfg.mode == STEDMA40_MODE_LOGICAL;
1872 if (d40c->dma_cfg.dir == DMA_DEV_TO_MEM) {
1875 } else if (d40c->dma_cfg.dir == DMA_MEM_TO_DEV ||
1876 d40c->dma_cfg.dir == DMA_MEM_TO_MEM) {
1887 if (d40c->dma_cfg.dir == DMA_MEM_TO_MEM) {
1889 if (d40c->dma_cfg.use_fixed_channel) {
1890 i = d40c->dma_cfg.phy_channel;
1928 if (d40c->dma_cfg.use_fixed_channel) {
1929 i = d40c->dma_cfg.phy_channel;
1988 d40c->dma_cfg = dma40_memcpy_conf_log;
1989 d40c->dma_cfg.dev_type = dma40_memcpy_channels[d40c->chan.chan_id];
1991 d40_log_cfg(&d40c->dma_cfg,
1996 d40c->dma_cfg = dma40_memcpy_conf_phy;
2017 u32 event = D40_TYPE_TO_EVENT(d40c->dma_cfg.dev_type);
2035 if (d40c->dma_cfg.dir == DMA_MEM_TO_DEV ||
2036 d40c->dma_cfg.dir == DMA_MEM_TO_MEM)
2038 else if (d40c->dma_cfg.dir == DMA_DEV_TO_MEM)
2080 u32 event = D40_TYPE_TO_EVENT(d40c->dma_cfg.dev_type);
2098 if (d40c->dma_cfg.dir == DMA_MEM_TO_DEV ||
2099 d40c->dma_cfg.dir == DMA_MEM_TO_MEM) {
2101 } else if (d40c->dma_cfg.dir == DMA_DEV_TO_MEM) {
2139 struct stedma40_chan_cfg *cfg = &chan->dma_cfg;
2167 struct stedma40_chan_cfg *cfg = &chan->dma_cfg;
2206 cfg = &chan->dma_cfg;
2306 d40c->dma_cfg = *info;
2318 bool realtime = d40c->dma_cfg.realtime;
2319 bool highprio = d40c->dma_cfg.high_priority;
2354 if ((d40c->dma_cfg.dir == DMA_DEV_TO_MEM) ||
2355 (d40c->dma_cfg.dir == DMA_DEV_TO_DEV))
2356 __d40_set_prio_rt(d40c, d40c->dma_cfg.dev_type, true);
2358 if ((d40c->dma_cfg.dir == DMA_MEM_TO_DEV) ||
2359 (d40c->dma_cfg.dir == DMA_DEV_TO_DEV))
2360 __d40_set_prio_rt(d40c, d40c->dma_cfg.dev_type, false);
2444 if (d40c->dma_cfg.dir == DMA_DEV_TO_MEM)
2446 d40c->dma_cfg.dev_type * D40_LCPA_CHAN_SIZE;
2449 d40c->dma_cfg.dev_type *
2460 d40c->dma_cfg.use_fixed_channel ? ", fixed" : "");
2684 struct stedma40_chan_cfg *cfg = &d40c->dma_cfg;