Lines Matching defs:src
260 * @src: Interrupt mask register.
267 u32 src;
357 * enough, IE bigger than the most common case, 1 dst and 1 src. NULL if
368 /* Space for dst and src, plus an extra for padding */
375 * @lli_phy: LLI settings for physical channel. Both src and dst=
437 * @allocated_src: Bit mapped to show which src event line's are mapped to
439 * @allocated_dst: Same as for src but is dst.
478 * @src_def_cfg: Default cfg register setting for src.
481 * @lcpa: Pointer to dst and src lcpa settings.
686 d40d->lli_log.src = PTR_ALIGN(base, align);
687 d40d->lli_log.dst = d40d->lli_log.src + lli_len;
691 d40d->lli_phy.src = PTR_ALIGN(base, align);
692 d40d->lli_phy.dst = d40d->lli_phy.src + lli_len;
695 d40d->lli_phy.src,
720 d40d->lli_log.src = NULL;
722 d40d->lli_phy.src = NULL;
736 * Allocate both src and dst at the same time, therefore the half
834 struct d40_phy_lli *lli_src = desc->lli_phy.src;
903 &lli->src[lli_current],
931 &lli->src[lli_current],
941 &lli->src[lli_current],
1233 * The hardware sometimes doesn't register the enable when src and dst
1680 regs[i] = readl(base->virtbase + il[i].src);
1759 * src (burst x width) == dst (burst x width)
1762 chan_err(d40c, "src (burst x width) != dst (burst x width)\n");
2146 desc->lli_log.src,
2177 desc->lli_phy.src,
2178 virt_to_phys(desc->lli_phy.src),
2316 static void __d40_set_prio_rt(struct d40_chan *d40c, int dev_type, bool src)
2336 if (!src && chan_is_logical(d40c))
2342 if (!src)
2500 dma_addr_t src,
2511 sg_dma_address(&src_sg) = src;
2745 "src/dst width/maxburst mismatch: %d*%d != %d*%d\n",