Lines Matching defs:src
180 static void prep_dma_xor_dbg(int id, dma_addr_t dst, dma_addr_t *src,
187 pr_debug("\t0x%016llx ", src[i]);
191 static void prep_dma_pq_dbg(int id, dma_addr_t *dst, dma_addr_t *src,
198 pr_debug("\t0x%016llx ", src[i]);
204 static void prep_dma_pqzero_sum_dbg(int id, dma_addr_t *src,
213 pr_debug("\t0x%016llx(0x%02x) ", src[i], scf[i]);
216 pr_debug("\t0x%016llx(no) ", src[i]);
221 pr_debug("\t0x%016llx ", src[src_cnt + i]);
350 * of the transaction (src, dst, ...)
485 * of the transaction (src, dst, ...)
2068 dma_addr_t *src, int src_cnt)
2075 desc->src_cnt, (u32)src[i]);
2085 dma_addr_t *dst, int dst_cnt, dma_addr_t *src, int src_cnt,
2127 src[0]);
2171 dma_addr_t *dst, dma_addr_t *src, int src_cnt,
2194 /* 1st descriptor, src[1] data to q page and zero destination */
2211 src[1]);
2215 /* 2nd descriptor, multiply src[1] data and store the
2242 * 3rd descriptor, multiply src[0] data and xor it
2258 src[0]);
2275 dma_addr_t *dst, int dst_cnt, dma_addr_t *src, int src_cnt,
2299 (src[0] + len) == src[1]) {
2304 if ((src[1] + len) == src[2]) {
2308 } else if ((src[1] + len * 2) == src[2]) {
2311 } else if ((src[1] + len * 3) == src[2]) {
2384 /* setup dst/src/mult */
2389 ppc440spe_adma_pq_set_src(sw_desc, src[src_cnt],
2420 dma_addr_t *dst, int dst_cnt, dma_addr_t *src, int src_cnt,
2433 descs_per_op = ppc440spe_dma2_pq_slot_count(src, src_cnt, len);
2461 ppc440spe_adma_init_dma2rxor_slot(iter, src,
2484 /* setup dst/src/mult */
2491 ppc440spe_adma_pq_set_src(sw_desc, src[src_cnt],
2508 struct dma_chan *chan, dma_addr_t *dst, dma_addr_t *src,
2519 dst, src, src_cnt));
2524 if (src_cnt == 1 && dst[1] == src[0]) {
2532 dest, 2, src, src_cnt, scf, len, flags);
2536 if (src_cnt == 2 && dst[1] == src[1]) {
2538 &dst[1], src, 2, scf, len, flags);
2565 dst, dst_cnt, src, src_cnt, scf,
2571 dst, dst_cnt, src, src_cnt, scf,
2584 struct dma_chan *chan, dma_addr_t *pq, dma_addr_t *src,
2606 src, src_cnt, scf));
2741 src[src_cnt - 1]);
2763 struct dma_chan *chan, dma_addr_t *src, unsigned int src_cnt,
2770 pq[0] = src[0];
2774 tx = ppc440spe_adma_prep_dma_pqzero_sum(chan, pq, &src[1],
3190 /* both P & Q calculations required; set P src here */
3697 * capabilities are enabled then we'll get src/dst filled with zero.
3717 /* 1 src, 1 dsr, int_ena, WXOR */