Lines Matching refs:pl330
514 .quirk = "arm,pl330-broken-no-flushp",
518 .quirk = "arm,pl330-periph-burst",
1185 static inline int _ldst_peripheral(struct pl330_dmac *pl330,
1196 if (!(pl330->quirks & PL330_QUIRK_BROKEN_NO_FLUSHP))
1209 static int _bursts(struct pl330_dmac *pl330, unsigned dry_run, u8 buf[],
1215 if (pl330->quirks & PL330_QUIRK_PERIPH_BURST)
1221 off += _ldst_peripheral(pl330, dry_run, &buf[off], pxs, cyc,
1243 static int _dregs(struct pl330_dmac *pl330, unsigned int dry_run, u8 buf[],
1271 off += _ldst_peripheral(pl330, dry_run, &buf[off], pxs, 1,
1290 static inline int _loop(struct pl330_dmac *pl330, unsigned dry_run, u8 buf[],
1298 return _bursts(pl330, dry_run, buf, pxs, 1);
1316 szbrst = _bursts(pl330, 1, buf, pxs, 1);
1348 off += _bursts(pl330, dry_run, &buf[off], pxs, cyc);
1371 static inline int _setup_loops(struct pl330_dmac *pl330,
1384 off += _loop(pl330, dry_run, &buf[off], &c, pxs);
1387 off += _dregs(pl330, dry_run, &buf[off], pxs, num_dregs);
1392 static inline int _setup_xfer(struct pl330_dmac *pl330,
1405 off += _setup_loops(pl330, dry_run, &buf[off], pxs);
1414 static int _setup_req(struct pl330_dmac *pl330, unsigned dry_run,
1427 off += _setup_xfer(pl330, dry_run, &buf[off], pxs);
1477 struct pl330_dmac *pl330 = thrd->dmac;
1498 if (pl330->state == DYING
1499 || pl330->dmac_tbd.reset_chan & (1 << thrd->id)) {
1507 desc->peri >= pl330->pcfg.num_peri) {
1514 spin_lock_irqsave(&pl330->lock, flags);
1535 ret = _setup_req(pl330, 1, thrd, idx, &xs);
1537 if (ret > pl330->mcbufsz / 2) {
1538 dev_info(pl330->ddma.dev, "%s:%d Try increasing mcbufsz (%i/%i)\n",
1539 __func__, __LINE__, ret, pl330->mcbufsz / 2);
1547 _setup_req(pl330, 0, thrd, idx, &xs);
1552 spin_unlock_irqrestore(&pl330->lock, flags);
1582 struct pl330_dmac *pl330 = from_tasklet(pl330, t, tasks);
1586 spin_lock_irqsave(&pl330->lock, flags);
1589 if (pl330->dmac_tbd.reset_dmac) {
1590 pl330->state = DYING;
1592 pl330->dmac_tbd.reset_mngr = true;
1594 pl330->dmac_tbd.reset_dmac = false;
1597 if (pl330->dmac_tbd.reset_mngr) {
1598 _stop(pl330->manager);
1600 pl330->dmac_tbd.reset_chan = (1 << pl330->pcfg.num_chan) - 1;
1602 pl330->dmac_tbd.reset_mngr = false;
1605 for (i = 0; i < pl330->pcfg.num_chan; i++) {
1607 if (pl330->dmac_tbd.reset_chan & (1 << i)) {
1608 struct pl330_thread *thrd = &pl330->channels[i];
1609 void __iomem *regs = pl330->base;
1619 spin_unlock_irqrestore(&pl330->lock, flags);
1622 spin_lock_irqsave(&pl330->lock, flags);
1629 pl330->dmac_tbd.reset_chan &= ~(1 << i);
1633 spin_unlock_irqrestore(&pl330->lock, flags);
1639 static int pl330_update(struct pl330_dmac *pl330)
1647 regs = pl330->base;
1649 spin_lock_irqsave(&pl330->lock, flags);
1653 pl330->dmac_tbd.reset_mngr = true;
1655 pl330->dmac_tbd.reset_mngr = false;
1657 val = readl(regs + FSC) & ((1 << pl330->pcfg.num_chan) - 1);
1658 pl330->dmac_tbd.reset_chan |= val;
1661 while (i < pl330->pcfg.num_chan) {
1663 dev_info(pl330->ddma.dev,
1667 _stop(&pl330->channels[i]);
1675 if (pl330->pcfg.num_events < 32
1676 && val & ~((1 << pl330->pcfg.num_events) - 1)) {
1677 pl330->dmac_tbd.reset_dmac = true;
1678 dev_err(pl330->ddma.dev, "%s:%d Unexpected!\n", __func__,
1684 for (ev = 0; ev < pl330->pcfg.num_events; ev++) {
1696 id = pl330->events[ev];
1698 thrd = &pl330->channels[id];
1714 list_add_tail(&descdone->rqd, &pl330->req_done);
1719 while (!list_empty(&pl330->req_done)) {
1720 descdone = list_first_entry(&pl330->req_done,
1723 spin_unlock_irqrestore(&pl330->lock, flags);
1725 spin_lock_irqsave(&pl330->lock, flags);
1729 spin_unlock_irqrestore(&pl330->lock, flags);
1731 if (pl330->dmac_tbd.reset_dmac
1732 || pl330->dmac_tbd.reset_mngr
1733 || pl330->dmac_tbd.reset_chan) {
1735 tasklet_schedule(&pl330->tasks);
1744 struct pl330_dmac *pl330 = thrd->dmac;
1747 for (ev = 0; ev < pl330->pcfg.num_events; ev++)
1748 if (pl330->events[ev] == -1) {
1749 pl330->events[ev] = thrd->id;
1756 static bool _chan_ns(const struct pl330_dmac *pl330, int i)
1758 return pl330->pcfg.irq_ns & (1 << i);
1764 static struct pl330_thread *pl330_request_channel(struct pl330_dmac *pl330)
1769 if (pl330->state == DYING)
1772 chans = pl330->pcfg.num_chan;
1775 thrd = &pl330->channels[i];
1777 _chan_ns(pl330, i))) {
1797 struct pl330_dmac *pl330 = thrd->dmac;
1800 if (ev >= 0 && ev < pl330->pcfg.num_events
1801 && pl330->events[ev] == thrd->id)
1802 pl330->events[ev] = -1;
1822 static void read_dmac_config(struct pl330_dmac *pl330)
1824 void __iomem *regs = pl330->base;
1829 pl330->pcfg.data_bus_width = 8 * (1 << val);
1833 pl330->pcfg.data_buf_dep = val + 1;
1838 pl330->pcfg.num_chan = val;
1844 pl330->pcfg.num_peri = val;
1845 pl330->pcfg.peri_ns = readl(regs + CR4);
1847 pl330->pcfg.num_peri = 0;
1852 pl330->pcfg.mode |= DMAC_MODE_NS;
1854 pl330->pcfg.mode &= ~DMAC_MODE_NS;
1859 pl330->pcfg.num_events = val;
1861 pl330->pcfg.irq_ns = readl(regs + CR3);
1866 struct pl330_dmac *pl330 = thrd->dmac;
1868 thrd->req[0].mc_cpu = pl330->mcode_cpu
1869 + (thrd->id * pl330->mcbufsz);
1870 thrd->req[0].mc_bus = pl330->mcode_bus
1871 + (thrd->id * pl330->mcbufsz);
1875 + pl330->mcbufsz / 2;
1877 + pl330->mcbufsz / 2;
1883 static int dmac_alloc_threads(struct pl330_dmac *pl330)
1885 int chans = pl330->pcfg.num_chan;
1890 pl330->channels = kcalloc(1 + chans, sizeof(*thrd),
1892 if (!pl330->channels)
1897 thrd = &pl330->channels[i];
1899 thrd->dmac = pl330;
1905 thrd = &pl330->channels[chans];
1907 thrd->dmac = pl330;
1909 pl330->manager = thrd;
1914 static int dmac_alloc_resources(struct pl330_dmac *pl330)
1916 int chans = pl330->pcfg.num_chan;
1923 pl330->mcode_cpu = dma_alloc_attrs(pl330->ddma.dev,
1924 chans * pl330->mcbufsz,
1925 &pl330->mcode_bus, GFP_KERNEL,
1927 if (!pl330->mcode_cpu) {
1928 dev_err(pl330->ddma.dev, "%s:%d Can't allocate memory!\n",
1933 ret = dmac_alloc_threads(pl330);
1935 dev_err(pl330->ddma.dev, "%s:%d Can't to create channels for DMAC!\n",
1937 dma_free_attrs(pl330->ddma.dev,
1938 chans * pl330->mcbufsz,
1939 pl330->mcode_cpu, pl330->mcode_bus,
1947 static int pl330_add(struct pl330_dmac *pl330)
1952 if ((pl330->pcfg.periph_id & 0xfffff) != PERIPH_ID_VAL) {
1953 dev_err(pl330->ddma.dev, "PERIPH_ID 0x%x !\n",
1954 pl330->pcfg.periph_id);
1959 read_dmac_config(pl330);
1961 if (pl330->pcfg.num_events == 0) {
1962 dev_err(pl330->ddma.dev, "%s:%d Can't work without events!\n",
1967 spin_lock_init(&pl330->lock);
1969 INIT_LIST_HEAD(&pl330->req_done);
1972 if (!pl330->mcbufsz)
1973 pl330->mcbufsz = MCODE_BUFF_PER_REQ * 2;
1976 for (i = 0; i < pl330->pcfg.num_events; i++)
1977 pl330->events[i] = -1;
1980 ret = dmac_alloc_resources(pl330);
1982 dev_err(pl330->ddma.dev, "Unable to create channels for DMAC\n");
1986 tasklet_setup(&pl330->tasks, pl330_dotask);
1988 pl330->state = INIT;
1993 static int dmac_free_threads(struct pl330_dmac *pl330)
1999 for (i = 0; i < pl330->pcfg.num_chan; i++) {
2000 thrd = &pl330->channels[i];
2005 kfree(pl330->channels);
2010 static void pl330_del(struct pl330_dmac *pl330)
2012 pl330->state = UNINIT;
2014 tasklet_kill(&pl330->tasks);
2017 dmac_free_threads(pl330);
2019 dma_free_attrs(pl330->ddma.dev,
2020 pl330->pcfg.num_chan * pl330->mcbufsz, pl330->mcode_cpu,
2021 pl330->mcode_bus, DMA_ATTR_PRIVILEGED);
2146 struct pl330_dmac *pl330 = ofdma->of_dma_data;
2149 if (!pl330)
2156 if (chan_id >= pl330->num_peripherals)
2159 return dma_get_slave_channel(&pl330->peripherals[chan_id].chan);
2165 struct pl330_dmac *pl330 = pch->dmac;
2168 spin_lock_irqsave(&pl330->lock, flags);
2173 pch->thread = pl330_request_channel(pl330);
2175 spin_unlock_irqrestore(&pl330->lock, flags);
2181 spin_unlock_irqrestore(&pl330->lock, flags);
2285 struct pl330_dmac *pl330 = pch->dmac;
2288 pm_runtime_get_sync(pl330->ddma.dev);
2291 spin_lock(&pl330->lock);
2296 spin_unlock(&pl330->lock);
2312 list_splice_tail_init(&pch->submitted_list, &pl330->desc_pool);
2313 list_splice_tail_init(&pch->work_list, &pl330->desc_pool);
2314 list_splice_tail_init(&pch->completed_list, &pl330->desc_pool);
2316 pm_runtime_mark_last_busy(pl330->ddma.dev);
2318 pm_runtime_put_autosuspend(pl330->ddma.dev);
2319 pm_runtime_put_autosuspend(pl330->ddma.dev);
2334 struct pl330_dmac *pl330 = pch->dmac;
2338 pm_runtime_get_sync(pl330->ddma.dev);
2341 spin_lock(&pl330->lock);
2343 spin_unlock(&pl330->lock);
2350 pm_runtime_mark_last_busy(pl330->ddma.dev);
2351 pm_runtime_put_autosuspend(pl330->ddma.dev);
2359 struct pl330_dmac *pl330 = pch->dmac;
2365 spin_lock_irqsave(&pl330->lock, flags);
2373 spin_unlock_irqrestore(&pl330->lock, flags);
2383 struct pl330_dmac *pl330 = pch->dmac;
2387 pm_runtime_get_sync(pl330->ddma.dev);
2397 pm_runtime_put_autosuspend(pl330->ddma.dev);
2597 struct pl330_dmac *pl330 = pch->dmac;
2602 desc = pluck_desc(&pl330->desc_pool, &pl330->pool_lock);
2668 struct pl330_dmac *pl330 = pch->dmac;
2671 burst_len = pl330->pcfg.data_bus_width / 8;
2672 burst_len *= pl330->pcfg.data_buf_dep / pl330->pcfg.num_chan;
2689 struct pl330_dmac *pl330 = pch->dmac;
2719 spin_lock_irqsave(&pl330->pool_lock, iflags);
2724 list_move_tail(&desc->node, &pl330->desc_pool);
2727 list_move_tail(&first->node, &pl330->desc_pool);
2729 spin_unlock_irqrestore(&pl330->pool_lock, iflags);
2779 struct pl330_dmac *pl330;
2785 pl330 = pch->dmac;
2796 burst = pl330->pcfg.data_bus_width / 8;
2815 if (burst * 8 < pl330->pcfg.data_bus_width)
2823 static void __pl330_giveback_desc(struct pl330_dmac *pl330,
2832 spin_lock_irqsave(&pl330->pool_lock, flags);
2837 list_move_tail(&desc->node, &pl330->desc_pool);
2840 list_move_tail(&first->node, &pl330->desc_pool);
2842 spin_unlock_irqrestore(&pl330->pool_lock, flags);
2869 struct pl330_dmac *pl330 = pch->dmac;
2874 __pl330_giveback_desc(pl330, first);
2924 struct pl330_dmac *pl330 = s->private;
2927 chans = pl330->pcfg.num_chan;
2928 pchs = pl330->num_peripherals;
2934 struct pl330_thread *thrd = &pl330->channels[ch];
2938 struct dma_pl330_chan *pch = &pl330->peripherals[pr];
2958 static inline void init_pl330_debugfs(struct pl330_dmac *pl330)
2960 debugfs_create_file(dev_name(pl330->ddma.dev),
2961 S_IFREG | 0444, NULL, pl330,
2965 static inline void init_pl330_debugfs(struct pl330_dmac *pl330)
3008 struct pl330_dmac *pl330;
3021 pl330 = devm_kzalloc(&adev->dev, sizeof(*pl330), GFP_KERNEL);
3022 if (!pl330)
3025 pd = &pl330->ddma;
3028 pl330->mcbufsz = 0;
3033 pl330->quirks |= of_quirks[i].id;
3036 pl330->base = devm_ioremap_resource(&adev->dev, res);
3037 if (IS_ERR(pl330->base))
3038 return PTR_ERR(pl330->base);
3040 amba_set_drvdata(adev, pl330);
3042 pl330->rstc = devm_reset_control_get_optional(&adev->dev, "dma");
3043 if (IS_ERR(pl330->rstc)) {
3044 return dev_err_probe(&adev->dev, PTR_ERR(pl330->rstc), "Failed to get reset!\n");
3046 ret = reset_control_deassert(pl330->rstc);
3053 pl330->rstc_ocp = devm_reset_control_get_optional(&adev->dev, "dma-ocp");
3054 if (IS_ERR(pl330->rstc_ocp)) {
3055 return dev_err_probe(&adev->dev, PTR_ERR(pl330->rstc_ocp),
3058 ret = reset_control_deassert(pl330->rstc_ocp);
3070 dev_name(&adev->dev), pl330);
3078 pcfg = &pl330->pcfg;
3081 ret = pl330_add(pl330);
3085 INIT_LIST_HEAD(&pl330->desc_pool);
3086 spin_lock_init(&pl330->pool_lock);
3089 if (!add_desc(&pl330->desc_pool, &pl330->pool_lock,
3098 pl330->num_peripherals = num_chan;
3100 pl330->peripherals = kcalloc(num_chan, sizeof(*pch), GFP_KERNEL);
3101 if (!pl330->peripherals) {
3107 pch = &pl330->peripherals[i];
3116 pch->dmac = pl330;
3154 of_dma_pl330_xlate, pl330);
3170 init_pl330_debugfs(pl330);
3187 list_for_each_entry_safe(pch, _p, &pl330->ddma.channels,
3200 pl330_del(pl330);
3202 if (pl330->rstc_ocp)
3203 reset_control_assert(pl330->rstc_ocp);
3205 if (pl330->rstc)
3206 reset_control_assert(pl330->rstc);
3212 struct pl330_dmac *pl330 = amba_get_drvdata(adev);
3216 pm_runtime_get_noresume(pl330->ddma.dev);
3224 devm_free_irq(&adev->dev, irq, pl330);
3227 dma_async_device_unregister(&pl330->ddma);
3230 list_for_each_entry_safe(pch, _p, &pl330->ddma.channels,
3243 pl330_del(pl330);
3245 if (pl330->rstc_ocp)
3246 reset_control_assert(pl330->rstc_ocp);
3248 if (pl330->rstc)
3249 reset_control_assert(pl330->rstc);
3265 .name = "dma-pl330",