Lines Matching refs:ccw
62 * ccw bits definitions
114 struct mxs_dma_ccw *ccw;
401 mxs_chan->ccw = dma_alloc_coherent(mxs_dma->dma_device.dev,
404 if (!mxs_chan->ccw) {
432 mxs_chan->ccw, mxs_chan->ccw_phys);
447 mxs_chan->ccw, mxs_chan->ccw_phys);
481 struct mxs_dma_ccw *ccw;
506 ccw = &mxs_chan->ccw[idx - 1];
507 ccw->next = mxs_chan->ccw_phys + sizeof(*ccw) * idx;
508 ccw->bits |= CCW_CHAIN;
509 ccw->bits &= ~CCW_IRQ;
510 ccw->bits &= ~CCW_DEC_SEM;
516 ccw = &mxs_chan->ccw[idx++];
520 ccw->pio_words[j++] = *pio++;
522 ccw->bits = 0;
523 ccw->bits |= CCW_IRQ;
524 ccw->bits |= CCW_DEC_SEM;
526 ccw->bits |= CCW_WAIT4END;
527 ccw->bits |= CCW_HALT_ON_TERM;
528 ccw->bits |= CCW_TERM_FLUSH;
529 ccw->bits |= BF_CCW(sg_len, PIO_NUM);
530 ccw->bits |= BF_CCW(MXS_DMA_CMD_NO_XFER, COMMAND);
532 ccw->bits |= CCW_WAIT4RDY;
541 ccw = &mxs_chan->ccw[idx++];
543 ccw->next = mxs_chan->ccw_phys + sizeof(*ccw) * idx;
544 ccw->bufaddr = sg->dma_address;
545 ccw->xfer_bytes = sg_dma_len(sg);
547 ccw->bits = 0;
548 ccw->bits |= CCW_CHAIN;
549 ccw->bits |= CCW_HALT_ON_TERM;
550 ccw->bits |= CCW_TERM_FLUSH;
551 ccw->bits |= BF_CCW(direction == DMA_DEV_TO_MEM ?
556 ccw->bits &= ~CCW_CHAIN;
557 ccw->bits |= CCW_IRQ;
558 ccw->bits |= CCW_DEC_SEM;
560 ccw->bits |= CCW_WAIT4END;
605 struct mxs_dma_ccw *ccw = &mxs_chan->ccw[i];
608 ccw->next = mxs_chan->ccw_phys;
610 ccw->next = mxs_chan->ccw_phys + sizeof(*ccw) * (i + 1);
612 ccw->bufaddr = dma_addr;
613 ccw->xfer_bytes = period_len;
615 ccw->bits = 0;
616 ccw->bits |= CCW_CHAIN;
617 ccw->bits |= CCW_IRQ;
618 ccw->bits |= CCW_HALT_ON_TERM;
619 ccw->bits |= CCW_TERM_FLUSH;
620 ccw->bits |= CCW_DEC_SEM;
621 ccw->bits |= BF_CCW(direction == DMA_DEV_TO_MEM ?
658 last_ccw = &mxs_chan->ccw[mxs_chan->desc_count - 1];