Lines Matching refs:val
115 u32 val;
118 val = md->len - 1;
119 writel_relaxed(val, mc->reg_ch_base + M10V_XDTBC);
121 val = md->src;
122 writel_relaxed(val, mc->reg_ch_base + M10V_XDSSA);
124 val = md->dst;
125 writel_relaxed(val, mc->reg_ch_base + M10V_XDDSA);
127 val = readl_relaxed(mc->reg_ch_base + M10V_XDSAC);
128 val &= ~(M10V_XDSAC_SBS | M10V_XDSAC_SBL);
129 val |= FIELD_PREP(M10V_XDSAC_SBS, M10V_DEFBS) |
131 writel_relaxed(val, mc->reg_ch_base + M10V_XDSAC);
133 val = readl_relaxed(mc->reg_ch_base + M10V_XDDAC);
134 val &= ~(M10V_XDDAC_DBS | M10V_XDDAC_DBL);
135 val |= FIELD_PREP(M10V_XDDAC_DBS, M10V_DEFBS) |
137 writel_relaxed(val, mc->reg_ch_base + M10V_XDDAC);
140 val = readl_relaxed(mc->reg_ch_base + M10V_XDDES);
141 val &= ~(M10V_XDDES_CE | M10V_XDDES_SE | M10V_XDDES_TF |
143 val |= FIELD_PREP(M10V_XDDES_CE, 1) | FIELD_PREP(M10V_XDDES_SE, 1) |
146 writel_relaxed(val, mc->reg_ch_base + M10V_XDDES);
163 u32 val;
168 val = FIELD_PREP(M10V_XDDSD_IS_MASK, 0x0);
169 writel_relaxed(val, mc->reg_ch_base + M10V_XDDSD);
211 u32 val;
218 val = readl(mc->reg_ch_base + M10V_XDDES);
219 val &= ~M10V_XDDES_CE;
220 val |= FIELD_PREP(M10V_XDDES_CE, 0);
221 writel(val, mc->reg_ch_base + M10V_XDDES);
294 unsigned int val;
296 val = readl(mdev->reg_base + M10V_XDACS);
297 val |= M10V_XDACS_XE;
298 writel(val, mdev->reg_base + M10V_XDACS);
303 unsigned int val;
305 val = readl(mdev->reg_base + M10V_XDACS);
306 val &= ~M10V_XDACS_XE;
307 writel(val, mdev->reg_base + M10V_XDACS);