Lines Matching defs:hsdma
263 static struct device *hsdma2dev(struct mtk_hsdma_device *hsdma)
265 return hsdma->ddev.dev;
268 static u32 mtk_dma_read(struct mtk_hsdma_device *hsdma, u32 reg)
270 return readl(hsdma->base + reg);
273 static void mtk_dma_write(struct mtk_hsdma_device *hsdma, u32 reg, u32 val)
275 writel(val, hsdma->base + reg);
278 static void mtk_dma_rmw(struct mtk_hsdma_device *hsdma, u32 reg,
283 val = mtk_dma_read(hsdma, reg);
286 mtk_dma_write(hsdma, reg, val);
289 static void mtk_dma_set(struct mtk_hsdma_device *hsdma, u32 reg, u32 val)
291 mtk_dma_rmw(hsdma, reg, 0, val);
294 static void mtk_dma_clr(struct mtk_hsdma_device *hsdma, u32 reg, u32 val)
296 mtk_dma_rmw(hsdma, reg, val, 0);
304 static int mtk_hsdma_busy_wait(struct mtk_hsdma_device *hsdma)
308 return readl_poll_timeout(hsdma->base + MTK_HSDMA_GLO, status,
314 static int mtk_hsdma_alloc_pchan(struct mtk_hsdma_device *hsdma,
327 ring->txd = dma_alloc_coherent(hsdma2dev(hsdma), pc->sz_ring,
346 mtk_dma_clr(hsdma, MTK_HSDMA_GLO, MTK_HSDMA_GLO_DMA);
347 err = mtk_hsdma_busy_wait(hsdma);
352 mtk_dma_set(hsdma, MTK_HSDMA_RESET,
354 mtk_dma_clr(hsdma, MTK_HSDMA_RESET,
358 mtk_dma_write(hsdma, MTK_HSDMA_TX_BASE, ring->tphys);
359 mtk_dma_write(hsdma, MTK_HSDMA_TX_CNT, MTK_DMA_SIZE);
360 mtk_dma_write(hsdma, MTK_HSDMA_TX_CPU, ring->cur_tptr);
361 mtk_dma_write(hsdma, MTK_HSDMA_TX_DMA, 0);
362 mtk_dma_write(hsdma, MTK_HSDMA_RX_BASE, ring->rphys);
363 mtk_dma_write(hsdma, MTK_HSDMA_RX_CNT, MTK_DMA_SIZE);
364 mtk_dma_write(hsdma, MTK_HSDMA_RX_CPU, ring->cur_rptr);
365 mtk_dma_write(hsdma, MTK_HSDMA_RX_DMA, 0);
368 mtk_dma_set(hsdma, MTK_HSDMA_GLO, MTK_HSDMA_GLO_DMA);
371 mtk_dma_write(hsdma, MTK_HSDMA_DLYINT, MTK_HSDMA_DLYINT_DEFAULT);
374 mtk_dma_set(hsdma, MTK_HSDMA_INT_ENABLE, MTK_HSDMA_INT_RXDONE);
382 dma_free_coherent(hsdma2dev(hsdma),
387 static void mtk_hsdma_free_pchan(struct mtk_hsdma_device *hsdma,
393 mtk_dma_clr(hsdma, MTK_HSDMA_GLO, MTK_HSDMA_GLO_DMA);
394 mtk_hsdma_busy_wait(hsdma);
397 mtk_dma_clr(hsdma, MTK_HSDMA_INT_ENABLE, MTK_HSDMA_INT_RXDONE);
398 mtk_dma_write(hsdma, MTK_HSDMA_TX_BASE, 0);
399 mtk_dma_write(hsdma, MTK_HSDMA_TX_CNT, 0);
400 mtk_dma_write(hsdma, MTK_HSDMA_TX_CPU, 0);
401 mtk_dma_write(hsdma, MTK_HSDMA_RX_BASE, 0);
402 mtk_dma_write(hsdma, MTK_HSDMA_RX_CNT, 0);
403 mtk_dma_write(hsdma, MTK_HSDMA_RX_CPU, MTK_DMA_SIZE - 1);
407 dma_free_coherent(hsdma2dev(hsdma),
411 static int mtk_hsdma_issue_pending_vdesc(struct mtk_hsdma_device *hsdma,
421 spin_lock_irqsave(&hsdma->lock, flags);
431 spin_unlock_irqrestore(&hsdma->lock, flags);
452 hsdma->soc->ls0 | MTK_HSDMA_DESC_PLEN(tlen));
487 mtk_dma_write(hsdma, MTK_HSDMA_TX_CPU, ring->cur_tptr);
489 spin_unlock_irqrestore(&hsdma->lock, flags);
494 static void mtk_hsdma_issue_vchan_pending(struct mtk_hsdma_device *hsdma,
508 err = mtk_hsdma_issue_pending_vdesc(hsdma, hsdma->pc, hvd);
532 static void mtk_hsdma_free_rooms_in_ring(struct mtk_hsdma_device *hsdma)
545 status = mtk_dma_read(hsdma, MTK_HSDMA_INT_STATUS);
549 pc = hsdma->pc;
568 if (!(desc2 & hsdma->soc->ddone))
573 dev_err(hsdma2dev(hsdma), "cb->vd cannot be null\n");
621 mtk_dma_write(hsdma, MTK_HSDMA_RX_CPU, pc->ring.cur_rptr);
629 mtk_dma_write(hsdma, MTK_HSDMA_INT_STATUS, status);
632 for (i = 0; i < hsdma->dma_requests; i++) {
633 hvc = &hsdma->vc[i];
635 mtk_hsdma_issue_vchan_pending(hsdma, hvc);
641 mtk_dma_set(hsdma, MTK_HSDMA_INT_ENABLE, MTK_HSDMA_INT_RXDONE);
646 struct mtk_hsdma_device *hsdma = devid;
652 mtk_dma_clr(hsdma, MTK_HSDMA_INT_ENABLE, MTK_HSDMA_INT_RXDONE);
654 mtk_hsdma_free_rooms_in_ring(hsdma);
707 struct mtk_hsdma_device *hsdma = to_hsdma_dev(c);
714 mtk_hsdma_issue_vchan_pending(hsdma, hvc);
809 struct mtk_hsdma_device *hsdma = to_hsdma_dev(c);
817 if (!refcount_read(&hsdma->pc_refcnt)) {
818 err = mtk_hsdma_alloc_pchan(hsdma, hsdma->pc);
825 refcount_set(&hsdma->pc_refcnt, 1);
827 refcount_inc(&hsdma->pc_refcnt);
835 struct mtk_hsdma_device *hsdma = to_hsdma_dev(c);
841 if (!refcount_dec_and_test(&hsdma->pc_refcnt))
844 mtk_hsdma_free_pchan(hsdma, hsdma->pc);
847 static int mtk_hsdma_hw_init(struct mtk_hsdma_device *hsdma)
851 pm_runtime_enable(hsdma2dev(hsdma));
852 pm_runtime_get_sync(hsdma2dev(hsdma));
854 err = clk_prepare_enable(hsdma->clk);
858 mtk_dma_write(hsdma, MTK_HSDMA_INT_ENABLE, 0);
859 mtk_dma_write(hsdma, MTK_HSDMA_GLO, MTK_HSDMA_GLO_DEFAULT);
864 static int mtk_hsdma_hw_deinit(struct mtk_hsdma_device *hsdma)
866 mtk_dma_write(hsdma, MTK_HSDMA_GLO, 0);
868 clk_disable_unprepare(hsdma->clk);
870 pm_runtime_put_sync(hsdma2dev(hsdma));
871 pm_runtime_disable(hsdma2dev(hsdma));
887 { .compatible = "mediatek,mt7623-hsdma", .data = &mt7623_soc},
888 { .compatible = "mediatek,mt7622-hsdma", .data = &mt7622_soc},
895 struct mtk_hsdma_device *hsdma;
900 hsdma = devm_kzalloc(&pdev->dev, sizeof(*hsdma), GFP_KERNEL);
901 if (!hsdma)
904 dd = &hsdma->ddev;
906 hsdma->base = devm_platform_ioremap_resource(pdev, 0);
907 if (IS_ERR(hsdma->base))
908 return PTR_ERR(hsdma->base);
910 hsdma->soc = of_device_get_match_data(&pdev->dev);
911 if (!hsdma->soc) {
916 hsdma->clk = devm_clk_get(&pdev->dev, "hsdma");
917 if (IS_ERR(hsdma->clk)) {
920 return PTR_ERR(hsdma->clk);
926 hsdma->irq = err;
928 refcount_set(&hsdma->pc_refcnt, 0);
929 spin_lock_init(&hsdma->lock);
947 hsdma->dma_requests = MTK_HSDMA_NR_VCHANS;
950 &hsdma->dma_requests)) {
956 hsdma->pc = devm_kcalloc(&pdev->dev, MTK_HSDMA_NR_MAX_PCHANS,
957 sizeof(*hsdma->pc), GFP_KERNEL);
958 if (!hsdma->pc)
961 hsdma->vc = devm_kcalloc(&pdev->dev, hsdma->dma_requests,
962 sizeof(*hsdma->vc), GFP_KERNEL);
963 if (!hsdma->vc)
966 for (i = 0; i < hsdma->dma_requests; i++) {
967 vc = &hsdma->vc[i];
979 of_dma_xlate_by_chan_id, hsdma);
986 mtk_hsdma_hw_init(hsdma);
988 err = devm_request_irq(&pdev->dev, hsdma->irq,
990 dev_name(&pdev->dev), hsdma);
997 platform_set_drvdata(pdev, hsdma);
1004 mtk_hsdma_hw_deinit(hsdma);
1014 struct mtk_hsdma_device *hsdma = platform_get_drvdata(pdev);
1019 for (i = 0; i < hsdma->dma_requests; i++) {
1020 vc = &hsdma->vc[i];
1027 mtk_dma_write(hsdma, MTK_HSDMA_INT_ENABLE, 0);
1030 synchronize_irq(hsdma->irq);
1033 mtk_hsdma_hw_deinit(hsdma);
1035 dma_async_device_unregister(&hsdma->ddev);