Lines Matching defs:watermark_level
127 * p_2_p watermark_level description
419 * @watermark_level: value for gReg[7], some script will extend it from
454 unsigned long watermark_level;
1120 dev_dbg(sdma->dev, "wml = 0x%08x\n", (u32)sdmac->watermark_level);
1142 context->gReg[7] = sdmac->watermark_level;
1228 int lwml = sdmac->watermark_level & SDMA_WATERMARK_LEVEL_LWML;
1229 int hwml = (sdmac->watermark_level & SDMA_WATERMARK_LEVEL_HWML) >> 16;
1235 sdmac->watermark_level |= SDMA_WATERMARK_LEVEL_LWE;
1238 sdmac->watermark_level |= SDMA_WATERMARK_LEVEL_HWE;
1246 sdmac->watermark_level &= ~(SDMA_WATERMARK_LEVEL_LWML |
1248 sdmac->watermark_level |= hwml;
1249 sdmac->watermark_level |= lwml << 16;
1255 sdmac->watermark_level |= SDMA_WATERMARK_LEVEL_SP;
1259 sdmac->watermark_level |= SDMA_WATERMARK_LEVEL_DP;
1261 sdmac->watermark_level |= SDMA_WATERMARK_LEVEL_CONT;
1271 sdmac->watermark_level |= SDMA_WATERMARK_LEVEL_SW_DONE;
1283 sdmac->watermark_level |=
1285 sdmac->watermark_level |=
1288 sdmac->watermark_level |=
1339 sdmac->watermark_level = 0; /* FIXME: M3_BASE_ADDRESS */
1772 sdmac->watermark_level = dmaengine_cfg->src_maxburst *
1778 sdmac->watermark_level = dmaengine_cfg->src_maxburst &
1780 sdmac->watermark_level |= (dmaengine_cfg->dst_maxburst << 16) &
1786 sdmac->watermark_level = 0;
1789 sdmac->watermark_level = dmaengine_cfg->dst_maxburst *