Lines Matching defs:imx_dmav1_writel
237 static void imx_dmav1_writel(struct imxdma_engine *imxdma, unsigned val,
273 imx_dmav1_writel(imxdma, sg->dma_address,
276 imx_dmav1_writel(imxdma, sg->dma_address,
279 imx_dmav1_writel(imxdma, now, DMA_CNTR(imxdmac->channel));
299 imx_dmav1_writel(imxdma, 1 << channel, DMA_DISR);
300 imx_dmav1_writel(imxdma, imx_dmav1_readl(imxdma, DMA_DIMR) &
302 imx_dmav1_writel(imxdma, imx_dmav1_readl(imxdma, DMA_CCR(channel)) |
312 imx_dmav1_writel(imxdma, tmp | CCR_RPT | CCR_ACRPT,
332 imx_dmav1_writel(imxdma, imx_dmav1_readl(imxdma, DMA_DIMR) |
334 imx_dmav1_writel(imxdma, imx_dmav1_readl(imxdma, DMA_CCR(channel)) &
336 imx_dmav1_writel(imxdma, 1 << channel, DMA_DISR);
346 imx_dmav1_writel(imxdma, 0, DMA_CCR(channel));
371 imx_dmav1_writel(imxdma, disr & err_mask, DMA_DISR);
379 imx_dmav1_writel(imxdma, 1 << i, DMA_DBTOSR);
383 imx_dmav1_writel(imxdma, 1 << i, DMA_DRTOSR);
387 imx_dmav1_writel(imxdma, 1 << i, DMA_DSESR);
391 imx_dmav1_writel(imxdma, 1 << i, DMA_DBOSR);
442 imx_dmav1_writel(imxdma, tmp, DMA_CCR(chno));
444 imx_dmav1_writel(imxdma, tmp & ~CCR_CEN,
449 imx_dmav1_writel(imxdma, tmp, DMA_CCR(chno));
465 imx_dmav1_writel(imxdma, 0, DMA_CCR(chno));
482 imx_dmav1_writel(imxdma, disr, DMA_DISR);
525 imx_dmav1_writel(imxdma, d->x, DMA_XSRA);
526 imx_dmav1_writel(imxdma, d->y, DMA_YSRA);
527 imx_dmav1_writel(imxdma, d->w, DMA_WSRA);
531 imx_dmav1_writel(imxdma, d->x, DMA_XSRB);
532 imx_dmav1_writel(imxdma, d->y, DMA_YSRB);
533 imx_dmav1_writel(imxdma, d->w, DMA_WSRB);
541 imx_dmav1_writel(imxdma, d->src, DMA_SAR(imxdmac->channel));
542 imx_dmav1_writel(imxdma, d->dest, DMA_DAR(imxdmac->channel));
543 imx_dmav1_writel(imxdma, d->config_mem | (d->config_port << 2),
546 imx_dmav1_writel(imxdma, d->len, DMA_CNTR(imxdmac->channel));
559 imx_dmav1_writel(imxdma, imxdmac->per_address,
561 imx_dmav1_writel(imxdma, imxdmac->ccr_from_device,
570 imx_dmav1_writel(imxdma, imxdmac->per_address,
572 imx_dmav1_writel(imxdma, imxdmac->ccr_to_device,
697 imx_dmav1_writel(imxdma, imxdmac->dma_request,
701 imx_dmav1_writel(imxdma, imxdmac->watermark_level *
1074 imx_dmav1_writel(imxdma, DCR_DRST, DMA_DCR);
1101 imx_dmav1_writel(imxdma, DCR_DEN, DMA_DCR);
1104 imx_dmav1_writel(imxdma, (1 << IMX_DMA_CHANNELS) - 1, DMA_DISR);
1107 imx_dmav1_writel(imxdma, (1 << IMX_DMA_CHANNELS) - 1, DMA_DIMR);