Lines Matching refs:idma64c
59 static void idma64_chan_init(struct idma64 *idma64, struct idma64_chan *idma64c)
67 channel_writel(idma64c, CFG_LO, cfglo);
68 channel_writel(idma64c, CFG_HI, cfghi);
71 channel_set_bit(idma64, MASK(XFER), idma64c->mask);
72 channel_set_bit(idma64, MASK(ERROR), idma64c->mask);
84 static void idma64_chan_stop(struct idma64 *idma64, struct idma64_chan *idma64c)
86 channel_clear_bit(idma64, CH_EN, idma64c->mask);
89 static void idma64_chan_start(struct idma64 *idma64, struct idma64_chan *idma64c)
91 struct idma64_desc *desc = idma64c->desc;
94 channel_writeq(idma64c, SAR, 0);
95 channel_writeq(idma64c, DAR, 0);
97 channel_writel(idma64c, CTL_HI, IDMA64C_CTLH_BLOCK_TS(~0UL));
98 channel_writel(idma64c, CTL_LO, IDMA64C_CTLL_LLP_S_EN | IDMA64C_CTLL_LLP_D_EN);
100 channel_writeq(idma64c, LLP, hw->llp);
102 channel_set_bit(idma64, CH_EN, idma64c->mask);
105 static void idma64_stop_transfer(struct idma64_chan *idma64c)
107 struct idma64 *idma64 = to_idma64(idma64c->vchan.chan.device);
109 idma64_chan_stop(idma64, idma64c);
112 static void idma64_start_transfer(struct idma64_chan *idma64c)
114 struct idma64 *idma64 = to_idma64(idma64c->vchan.chan.device);
118 vdesc = vchan_next_desc(&idma64c->vchan);
120 idma64c->desc = NULL;
125 idma64c->desc = to_idma64_desc(vdesc);
128 idma64_chan_init(idma64, idma64c);
131 idma64_chan_start(idma64, idma64c);
139 struct idma64_chan *idma64c = &idma64->chan[c];
143 stat = this_cpu_ptr(idma64c->vchan.chan.local);
145 spin_lock(&idma64c->vchan.lock);
146 desc = idma64c->desc;
149 dma_writel(idma64, CLEAR(ERROR), idma64c->mask);
152 dma_writel(idma64, CLEAR(XFER), idma64c->mask);
156 idma64_start_transfer(idma64c);
159 /* idma64_start_transfer() updates idma64c->desc */
160 if (idma64c->desc == NULL || desc->status == DMA_ERROR)
161 idma64_stop_transfer(idma64c);
163 spin_unlock(&idma64c->vchan.lock);
208 static void idma64_desc_free(struct idma64_chan *idma64c,
218 dma_pool_free(idma64c->pool, hw->lli, hw->llp);
228 struct idma64_chan *idma64c = to_idma64_chan(vdesc->tx.chan);
230 idma64_desc_free(idma64c, to_idma64_desc(vdesc));
272 static void idma64_desc_fill(struct idma64_chan *idma64c,
275 struct dma_slave_config *config = &idma64c->config;
301 struct idma64_chan *idma64c = to_idma64_chan(chan);
314 hw->lli = dma_pool_alloc(idma64c->pool, GFP_NOWAIT, &hw->llp);
317 idma64_desc_free(idma64c, desc);
329 idma64_desc_fill(idma64c, desc);
330 return vchan_tx_prep(&idma64c->vchan, &desc->vdesc, flags);
335 struct idma64_chan *idma64c = to_idma64_chan(chan);
338 spin_lock_irqsave(&idma64c->vchan.lock, flags);
339 if (vchan_issue_pending(&idma64c->vchan) && !idma64c->desc)
340 idma64_start_transfer(idma64c);
341 spin_unlock_irqrestore(&idma64c->vchan.lock, flags);
344 static size_t idma64_active_desc_size(struct idma64_chan *idma64c)
346 struct idma64_desc *desc = idma64c->desc;
349 u64 llp = channel_readq(idma64c, LLP);
350 u32 ctlhi = channel_readl(idma64c, CTL_HI);
372 struct idma64_chan *idma64c = to_idma64_chan(chan);
382 spin_lock_irqsave(&idma64c->vchan.lock, flags);
383 vdesc = vchan_find_desc(&idma64c->vchan, cookie);
384 if (idma64c->desc && cookie == idma64c->desc->vdesc.tx.cookie) {
385 bytes = idma64_active_desc_size(idma64c);
387 status = idma64c->desc->status;
392 spin_unlock_irqrestore(&idma64c->vchan.lock, flags);
408 struct idma64_chan *idma64c = to_idma64_chan(chan);
410 memcpy(&idma64c->config, config, sizeof(idma64c->config));
412 convert_burst(&idma64c->config.src_maxburst);
413 convert_burst(&idma64c->config.dst_maxburst);
418 static void idma64_chan_deactivate(struct idma64_chan *idma64c, bool drain)
423 cfglo = channel_readl(idma64c, CFG_LO);
429 channel_writel(idma64c, CFG_LO, cfglo | IDMA64C_CFGL_CH_SUSP);
432 cfglo = channel_readl(idma64c, CFG_LO);
436 static void idma64_chan_activate(struct idma64_chan *idma64c)
440 cfglo = channel_readl(idma64c, CFG_LO);
441 channel_writel(idma64c, CFG_LO, cfglo & ~IDMA64C_CFGL_CH_SUSP);
446 struct idma64_chan *idma64c = to_idma64_chan(chan);
449 spin_lock_irqsave(&idma64c->vchan.lock, flags);
450 if (idma64c->desc && idma64c->desc->status == DMA_IN_PROGRESS) {
451 idma64_chan_deactivate(idma64c, false);
452 idma64c->desc->status = DMA_PAUSED;
454 spin_unlock_irqrestore(&idma64c->vchan.lock, flags);
461 struct idma64_chan *idma64c = to_idma64_chan(chan);
464 spin_lock_irqsave(&idma64c->vchan.lock, flags);
465 if (idma64c->desc && idma64c->desc->status == DMA_PAUSED) {
466 idma64c->desc->status = DMA_IN_PROGRESS;
467 idma64_chan_activate(idma64c);
469 spin_unlock_irqrestore(&idma64c->vchan.lock, flags);
476 struct idma64_chan *idma64c = to_idma64_chan(chan);
480 spin_lock_irqsave(&idma64c->vchan.lock, flags);
481 idma64_chan_deactivate(idma64c, true);
482 idma64_stop_transfer(idma64c);
483 if (idma64c->desc) {
484 idma64_vdesc_free(&idma64c->desc->vdesc);
485 idma64c->desc = NULL;
487 vchan_get_all_descriptors(&idma64c->vchan, &head);
488 spin_unlock_irqrestore(&idma64c->vchan.lock, flags);
490 vchan_dma_desc_free_list(&idma64c->vchan, &head);
496 struct idma64_chan *idma64c = to_idma64_chan(chan);
498 vchan_synchronize(&idma64c->vchan);
503 struct idma64_chan *idma64c = to_idma64_chan(chan);
506 idma64c->pool = dma_pool_create(dev_name(chan2dev(chan)),
509 if (!idma64c->pool) {
519 struct idma64_chan *idma64c = to_idma64_chan(chan);
522 dma_pool_destroy(idma64c->pool);
523 idma64c->pool = NULL;
564 struct idma64_chan *idma64c = &idma64->chan[i];
566 idma64c->vchan.desc_free = idma64_vdesc_free;
567 vchan_init(&idma64c->vchan, &idma64->dma);
569 idma64c->regs = idma64->regs + i * IDMA64_CH_LENGTH;
570 idma64c->mask = BIT(i);
621 struct idma64_chan *idma64c = &idma64->chan[i];
623 tasklet_kill(&idma64c->vchan.task);