Lines Matching defs:idma64
19 #include <linux/dma/idma64.h>
21 #include "idma64.h"
35 static void idma64_off(struct idma64 *idma64)
39 dma_writel(idma64, CFG, 0);
41 channel_clear_bit(idma64, MASK(XFER), idma64->all_chan_mask);
42 channel_clear_bit(idma64, MASK(BLOCK), idma64->all_chan_mask);
43 channel_clear_bit(idma64, MASK(SRC_TRAN), idma64->all_chan_mask);
44 channel_clear_bit(idma64, MASK(DST_TRAN), idma64->all_chan_mask);
45 channel_clear_bit(idma64, MASK(ERROR), idma64->all_chan_mask);
49 } while (dma_readl(idma64, CFG) & IDMA64_CFG_DMA_EN && --count);
52 static void idma64_on(struct idma64 *idma64)
54 dma_writel(idma64, CFG, IDMA64_CFG_DMA_EN);
59 static void idma64_chan_init(struct idma64 *idma64, struct idma64_chan *idma64c)
71 channel_set_bit(idma64, MASK(XFER), idma64c->mask);
72 channel_set_bit(idma64, MASK(ERROR), idma64c->mask);
81 idma64_on(idma64);
84 static void idma64_chan_stop(struct idma64 *idma64, struct idma64_chan *idma64c)
86 channel_clear_bit(idma64, CH_EN, idma64c->mask);
89 static void idma64_chan_start(struct idma64 *idma64, struct idma64_chan *idma64c)
102 channel_set_bit(idma64, CH_EN, idma64c->mask);
107 struct idma64 *idma64 = to_idma64(idma64c->vchan.chan.device);
109 idma64_chan_stop(idma64, idma64c);
114 struct idma64 *idma64 = to_idma64(idma64c->vchan.chan.device);
128 idma64_chan_init(idma64, idma64c);
131 idma64_chan_start(idma64, idma64c);
136 static void idma64_chan_irq(struct idma64 *idma64, unsigned short c,
139 struct idma64_chan *idma64c = &idma64->chan[c];
149 dma_writel(idma64, CLEAR(ERROR), idma64c->mask);
152 dma_writel(idma64, CLEAR(XFER), idma64c->mask);
168 struct idma64 *idma64 = dev;
169 u32 status = dma_readl(idma64, STATUS_INT);
174 dev_vdbg(idma64->dma.dev, "%s: status=%#x\n", __func__, status);
180 status_xfer = dma_readl(idma64, RAW(XFER));
181 status_err = dma_readl(idma64, RAW(ERROR));
183 for (i = 0; i < idma64->dma.chancnt; i++)
184 idma64_chan_irq(idma64, i, status_err, status_xfer);
535 struct idma64 *idma64;
540 idma64 = devm_kzalloc(chip->dev, sizeof(*idma64), GFP_KERNEL);
541 if (!idma64)
544 idma64->regs = chip->regs;
545 chip->idma64 = idma64;
547 idma64->chan = devm_kcalloc(chip->dev, nr_chan, sizeof(*idma64->chan),
549 if (!idma64->chan)
552 idma64->all_chan_mask = (1 << nr_chan) - 1;
555 idma64_off(idma64);
558 dev_name(chip->dev), idma64);
562 INIT_LIST_HEAD(&idma64->dma.channels);
564 struct idma64_chan *idma64c = &idma64->chan[i];
567 vchan_init(&idma64c->vchan, &idma64->dma);
569 idma64c->regs = idma64->regs + i * IDMA64_CH_LENGTH;
573 dma_cap_set(DMA_SLAVE, idma64->dma.cap_mask);
574 dma_cap_set(DMA_PRIVATE, idma64->dma.cap_mask);
576 idma64->dma.device_alloc_chan_resources = idma64_alloc_chan_resources;
577 idma64->dma.device_free_chan_resources = idma64_free_chan_resources;
579 idma64->dma.device_prep_slave_sg = idma64_prep_slave_sg;
581 idma64->dma.device_issue_pending = idma64_issue_pending;
582 idma64->dma.device_tx_status = idma64_tx_status;
584 idma64->dma.device_config = idma64_slave_config;
585 idma64->dma.device_pause = idma64_pause;
586 idma64->dma.device_resume = idma64_resume;
587 idma64->dma.device_terminate_all = idma64_terminate_all;
588 idma64->dma.device_synchronize = idma64_synchronize;
590 idma64->dma.src_addr_widths = IDMA64_BUSWIDTHS;
591 idma64->dma.dst_addr_widths = IDMA64_BUSWIDTHS;
592 idma64->dma.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV);
593 idma64->dma.residue_granularity = DMA_RESIDUE_GRANULARITY_BURST;
595 idma64->dma.dev = chip->sysdev;
597 dma_set_max_seg_size(idma64->dma.dev, IDMA64C_CTLH_BLOCK_TS_MASK);
599 ret = dma_async_device_register(&idma64->dma);
609 struct idma64 *idma64 = chip->idma64;
612 dma_async_device_unregister(&idma64->dma);
618 devm_free_irq(chip->dev, chip->irq, idma64);
620 for (i = 0; i < idma64->dma.chancnt; i++) {
621 struct idma64_chan *idma64c = &idma64->chan[i];
676 idma64_off(chip->idma64);
684 idma64_on(chip->idma64);