Lines Matching defs:reg_width
355 u32 reg_width, val;
362 reg_width = __ffs(chan->config.dst_addr_width);
363 if (reg_width == DWAXIDMAC_TRANS_WIDTH_16)
607 unsigned int reg_width;
628 reg_width = __ffs(chan->config.dst_addr_width);
630 ctllo = reg_width << CH_CTL_L_DST_WIDTH_POS |
637 reg_width = __ffs(chan->config.src_addr_width);
639 ctllo = reg_width << CH_CTL_L_SRC_WIDTH_POS |
643 block_ts = len >> reg_width;
691 u32 data_width, reg_width, mem_width;
706 reg_width = __ffs(chan->config.src_addr_width);
707 block_len = axi_block_ts << reg_width;